summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/phy/brcm-sata-phy.txt
diff options
context:
space:
mode:
Diffstat (limited to 'Documentation/devicetree/bindings/phy/brcm-sata-phy.txt')
-rw-r--r--Documentation/devicetree/bindings/phy/brcm-sata-phy.txt58
1 files changed, 58 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/brcm-sata-phy.txt b/Documentation/devicetree/bindings/phy/brcm-sata-phy.txt
new file mode 100644
index 000000000..c03ad2198
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/brcm-sata-phy.txt
@@ -0,0 +1,58 @@
+* Broadcom SATA3 PHY
+
+Required properties:
+- compatible: should be one or more of
+ "brcm,bcm7216-sata-phy"
+ "brcm,bcm7425-sata-phy"
+ "brcm,bcm7445-sata-phy"
+ "brcm,iproc-ns2-sata-phy"
+ "brcm,iproc-nsp-sata-phy"
+ "brcm,phy-sata3"
+ "brcm,iproc-sr-sata-phy"
+ "brcm,bcm63138-sata-phy"
+- address-cells: should be 1
+- size-cells: should be 0
+- reg: register ranges for the PHY PCB interface
+- reg-names: should be "phy" and "phy-ctrl"
+ The "phy-ctrl" registers are only required for
+ "brcm,iproc-ns2-sata-phy" and "brcm,iproc-sr-sata-phy".
+
+Sub-nodes:
+ Each port's PHY should be represented as a sub-node.
+
+Sub-nodes required properties:
+- reg: the PHY number
+- phy-cells: generic PHY binding; must be 0
+
+Sub-nodes optional properties:
+- brcm,enable-ssc: use spread spectrum clocking (SSC) on this port
+ This property is not applicable for "brcm,iproc-ns2-sata-phy",
+ "brcm,iproc-nsp-sata-phy" and "brcm,iproc-sr-sata-phy".
+
+- brcm,rxaeq-mode: string that indicates the desired RX equalizer
+ mode, possible values are:
+ "off" (equivalent to not specifying the property)
+ "auto"
+ "manual" (brcm,rxaeq-value is used in that case)
+
+- brcm,rxaeq-value: when 'rxaeq-mode' is set to "manual", provides the RX
+ equalizer value that should be used. Allowed range is 0..63.
+
+Example
+ sata-phy@f0458100 {
+ compatible = "brcm,bcm7445-sata-phy", "brcm,phy-sata3";
+ reg = <0xf0458100 0x1e00>, <0xf045804c 0x10>;
+ reg-names = "phy";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sata-phy@0 {
+ reg = <0>;
+ #phy-cells = <0>;
+ };
+
+ sata-phy@1 {
+ reg = <1>;
+ #phy-cells = <0>;
+ };
+ };