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Diffstat (limited to 'arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts')
-rw-r--r--arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts84
1 files changed, 84 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts b/arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts
new file mode 100644
index 000000000..3eca65e8e
--- /dev/null
+++ b/arch/arm/boot/dts/picoxcell-pc7302-pc3x3.dts
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2011 Picochip, Jamie Iles
+ */
+
+/dts-v1/;
+/include/ "picoxcell-pc3x3.dtsi"
+/ {
+ model = "Picochip PC7302 (PC3X3)";
+ compatible = "picochip,pc7302-pc3x3", "picochip,pc3x3";
+
+ memory {
+ device_type = "memory";
+ reg = <0x0 0x08000000>;
+ };
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ clocks {
+ ref_clk: clock@10 {
+ compatible = "fixed-clock";
+ clock-outputs = "ref";
+ clock-frequency = <20000000>;
+ };
+
+ clkgate: clkgate@800a0048 {
+ clock@4 {
+ picochip,clk-no-disable;
+ };
+ };
+ };
+
+ rwid-axi {
+ ebi@50000000 {
+ nand: gpio-nand@2,0 {
+ compatible = "gpio-control-nand";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <2 0x0000 0x1000>;
+ bus-clock = <&ebi_clk>, "bus";
+ gpio-control-nand,io-sync-reg =
+ <0x00000000 0x80220000>;
+
+ gpios = <&banka 1 0 /* rdy */
+ &banka 2 0 /* nce */
+ &banka 3 0 /* ale */
+ &banka 4 0 /* cle */
+ 0 /* nwp */>;
+
+ boot@100000 {
+ label = "Boot";
+ reg = <0x100000 0x80000>;
+ };
+
+ redundant-boot@200000 {
+ label = "Redundant Boot";
+ reg = <0x200000 0x80000>;
+ };
+
+ boot-env@300000 {
+ label = "Boot Evironment";
+ reg = <0x300000 0x20000>;
+ };
+
+ redundant-boot-env@320000 {
+ label = "Redundant Boot Environment";
+ reg = <0x300000 0x20000>;
+ };
+
+ kernel@380000 {
+ label = "Kernel";
+ reg = <0x380000 0x800000>;
+ };
+
+ fs@b80000 {
+ label = "File System";
+ reg = <0xb80000 0xf480000>;
+ };
+ };
+ };
+ };
+};