diff options
Diffstat (limited to 'arch/arm/mach-ebsa110/include')
| -rw-r--r-- | arch/arm/mach-ebsa110/include/mach/entry-macro.S | 33 | ||||
| -rw-r--r-- | arch/arm/mach-ebsa110/include/mach/hardware.h | 21 | ||||
| -rw-r--r-- | arch/arm/mach-ebsa110/include/mach/io.h | 89 | ||||
| -rw-r--r-- | arch/arm/mach-ebsa110/include/mach/irqs.h | 17 | ||||
| -rw-r--r-- | arch/arm/mach-ebsa110/include/mach/memory.h | 22 | ||||
| -rw-r--r-- | arch/arm/mach-ebsa110/include/mach/uncompress.h | 41 |
6 files changed, 223 insertions, 0 deletions
diff --git a/arch/arm/mach-ebsa110/include/mach/entry-macro.S b/arch/arm/mach-ebsa110/include/mach/entry-macro.S new file mode 100644 index 000000000..14b110de7 --- /dev/null +++ b/arch/arm/mach-ebsa110/include/mach/entry-macro.S @@ -0,0 +1,33 @@ +/* + * arch/arm/mach-ebsa110/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for ebsa110 platform. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + + + +#define IRQ_STAT 0xff000000 /* read */ + + .macro get_irqnr_preamble, base, tmp + mov \base, #IRQ_STAT + .endm + + .macro get_irqnr_and_base, irqnr, stat, base, tmp + ldrb \stat, [\base] @ get interrupts + mov \irqnr, #0 + tst \stat, #15 + addeq \irqnr, \irqnr, #4 + moveq \stat, \stat, lsr #4 + tst \stat, #3 + addeq \irqnr, \irqnr, #2 + moveq \stat, \stat, lsr #2 + tst \stat, #1 + addeq \irqnr, \irqnr, #1 + moveq \stat, \stat, lsr #1 + tst \stat, #1 @ bit 0 should be set + .endm + diff --git a/arch/arm/mach-ebsa110/include/mach/hardware.h b/arch/arm/mach-ebsa110/include/mach/hardware.h new file mode 100644 index 000000000..81f696768 --- /dev/null +++ b/arch/arm/mach-ebsa110/include/mach/hardware.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * arch/arm/mach-ebsa110/include/mach/hardware.h + * + * Copyright (C) 1996-2000 Russell King. + * + * This file contains the hardware definitions of the EBSA-110. + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#define ISAMEM_BASE 0xe0000000 +#define ISAIO_BASE 0xf0000000 + +/* + * RAM definitions + */ +#define UNCACHEABLE_ADDR 0xff000000 /* IRQ_STAT */ + +#endif + diff --git a/arch/arm/mach-ebsa110/include/mach/io.h b/arch/arm/mach-ebsa110/include/mach/io.h new file mode 100644 index 000000000..ad170886c --- /dev/null +++ b/arch/arm/mach-ebsa110/include/mach/io.h @@ -0,0 +1,89 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * arch/arm/mach-ebsa110/include/mach/io.h + * + * Copyright (C) 1997,1998 Russell King + * + * Modifications: + * 06-Dec-1997 RMK Created. + */ +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +u8 __inb8(unsigned int port); +void __outb8(u8 val, unsigned int port); + +u8 __inb16(unsigned int port); +void __outb16(u8 val, unsigned int port); + +u16 __inw(unsigned int port); +void __outw(u16 val, unsigned int port); + +u32 __inl(unsigned int port); +void __outl(u32 val, unsigned int port); + +u8 __readb(const volatile void __iomem *addr); +u16 __readw(const volatile void __iomem *addr); +u32 __readl(const volatile void __iomem *addr); + +void __writeb(u8 val, volatile void __iomem *addr); +void __writew(u16 val, volatile void __iomem *addr); +void __writel(u32 val, volatile void __iomem *addr); + +/* + * Argh, someone forgot the IOCS16 line. We therefore have to handle + * the byte stearing by selecting the correct byte IO functions here. + */ +#ifdef ISA_SIXTEEN_BIT_PERIPHERAL +#define inb(p) __inb16(p) +#define outb(v,p) __outb16(v,p) +#else +#define inb(p) __inb8(p) +#define outb(v,p) __outb8(v,p) +#endif + +#define inw(p) __inw(p) +#define outw(v,p) __outw(v,p) + +#define inl(p) __inl(p) +#define outl(v,p) __outl(v,p) + +#define readb(b) __readb(b) +#define readw(b) __readw(b) +#define readl(b) __readl(b) +#define readb_relaxed(addr) readb(addr) +#define readw_relaxed(addr) readw(addr) +#define readl_relaxed(addr) readl(addr) + +#define writeb(v,b) __writeb(v,b) +#define writew(v,b) __writew(v,b) +#define writel(v,b) __writel(v,b) + +#define insb insb +extern void insb(unsigned int port, void *buf, int sz); +#define insw insw +extern void insw(unsigned int port, void *buf, int sz); +#define insl insl +extern void insl(unsigned int port, void *buf, int sz); + +#define outsb outsb +extern void outsb(unsigned int port, const void *buf, int sz); +#define outsw outsw +extern void outsw(unsigned int port, const void *buf, int sz); +#define outsl outsl +extern void outsl(unsigned int port, const void *buf, int sz); + +/* can't support writesb atm */ +#define writesw writesw +extern void writesw(volatile void __iomem *addr, const void *data, int wordlen); +#define writesl writesl +extern void writesl(volatile void __iomem *addr, const void *data, int longlen); + +/* can't support readsb atm */ +#define readsw readsw +extern void readsw(const volatile void __iomem *addr, void *data, int wordlen); + +#define readsl readsl +extern void readsl(const volatile void __iomem *addr, void *data, int longlen); + +#endif diff --git a/arch/arm/mach-ebsa110/include/mach/irqs.h b/arch/arm/mach-ebsa110/include/mach/irqs.h new file mode 100644 index 000000000..29a8671fe --- /dev/null +++ b/arch/arm/mach-ebsa110/include/mach/irqs.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * arch/arm/mach-ebsa110/include/mach/irqs.h + * + * Copyright (C) 1996 Russell King + */ + +#define NR_IRQS 8 + +#define IRQ_EBSA110_PRINTER 0 +#define IRQ_EBSA110_COM1 1 +#define IRQ_EBSA110_COM2 2 +#define IRQ_EBSA110_ETHERNET 3 +#define IRQ_EBSA110_TIMER0 4 +#define IRQ_EBSA110_TIMER1 5 +#define IRQ_EBSA110_PCMCIA 6 +#define IRQ_EBSA110_IMMEDIATE 7 diff --git a/arch/arm/mach-ebsa110/include/mach/memory.h b/arch/arm/mach-ebsa110/include/mach/memory.h new file mode 100644 index 000000000..f025f405d --- /dev/null +++ b/arch/arm/mach-ebsa110/include/mach/memory.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * arch/arm/mach-ebsa110/include/mach/memory.h + * + * Copyright (C) 1996-1999 Russell King. + * + * Changelog: + * 20-Oct-1996 RMK Created + * 31-Dec-1997 RMK Fixed definitions to reduce warnings + * 21-Mar-1999 RMK Renamed to memory.h + * RMK Moved TASK_SIZE and PAGE_OFFSET here + */ +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +/* + * Cache flushing area - SRAM + */ +#define FLUSH_BASE_PHYS 0x40000000 +#define FLUSH_BASE 0xdf000000 + +#endif diff --git a/arch/arm/mach-ebsa110/include/mach/uncompress.h b/arch/arm/mach-ebsa110/include/mach/uncompress.h new file mode 100644 index 000000000..3ec12efe9 --- /dev/null +++ b/arch/arm/mach-ebsa110/include/mach/uncompress.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * arch/arm/mach-ebsa110/include/mach/uncompress.h + * + * Copyright (C) 1996,1997,1998 Russell King + */ + +#include <linux/serial_reg.h> + +#define SERIAL_BASE ((unsigned char *)0xf0000be0) + +/* + * This does not append a newline + */ +static inline void putc(int c) +{ + unsigned char v, *base = SERIAL_BASE; + + do { + v = base[UART_LSR << 2]; + barrier(); + } while (!(v & UART_LSR_THRE)); + + base[UART_TX << 2] = c; +} + +static inline void flush(void) +{ + unsigned char v, *base = SERIAL_BASE; + + do { + v = base[UART_LSR << 2]; + barrier(); + } while ((v & (UART_LSR_TEMT|UART_LSR_THRE)) != + (UART_LSR_TEMT|UART_LSR_THRE)); +} + +/* + * nothing to do + */ +#define arch_decomp_setup() |