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-rw-r--r--tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json2817
1 files changed, 2817 insertions, 0 deletions
diff --git a/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json
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index 000000000..6e61ae20d
--- /dev/null
+++ b/tools/perf/pmu-events/arch/x86/westmereep-dp/cache.json
@@ -0,0 +1,2817 @@
+[
+ {
+ "EventCode": "0x63",
+ "Counter": "0,1",
+ "UMask": "0x2",
+ "EventName": "CACHE_LOCK_CYCLES.L1D",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Cycles L1D locked"
+ },
+ {
+ "EventCode": "0x63",
+ "Counter": "0,1",
+ "UMask": "0x1",
+ "EventName": "CACHE_LOCK_CYCLES.L1D_L2",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Cycles L1D and L2 locked"
+ },
+ {
+ "EventCode": "0x51",
+ "Counter": "0,1",
+ "UMask": "0x4",
+ "EventName": "L1D.M_EVICT",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "L1D cache lines replaced in M state"
+ },
+ {
+ "EventCode": "0x51",
+ "Counter": "0,1",
+ "UMask": "0x2",
+ "EventName": "L1D.M_REPL",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "L1D cache lines allocated in the M state"
+ },
+ {
+ "EventCode": "0x51",
+ "Counter": "0,1",
+ "UMask": "0x8",
+ "EventName": "L1D.M_SNOOP_EVICT",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "L1D snoop eviction of cache lines in M state"
+ },
+ {
+ "EventCode": "0x51",
+ "Counter": "0,1",
+ "UMask": "0x1",
+ "EventName": "L1D.REPL",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "L1 data cache lines allocated"
+ },
+ {
+ "EventCode": "0x52",
+ "Counter": "0,1",
+ "UMask": "0x1",
+ "EventName": "L1D_CACHE_PREFETCH_LOCK_FB_HIT",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "L1D prefetch load lock accepted in fill buffer"
+ },
+ {
+ "EventCode": "0x4E",
+ "Counter": "0,1",
+ "UMask": "0x2",
+ "EventName": "L1D_PREFETCH.MISS",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L1D hardware prefetch misses"
+ },
+ {
+ "EventCode": "0x4E",
+ "Counter": "0,1",
+ "UMask": "0x1",
+ "EventName": "L1D_PREFETCH.REQUESTS",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L1D hardware prefetch requests"
+ },
+ {
+ "EventCode": "0x4E",
+ "Counter": "0,1",
+ "UMask": "0x4",
+ "EventName": "L1D_PREFETCH.TRIGGERS",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L1D hardware prefetch requests triggered"
+ },
+ {
+ "EventCode": "0x28",
+ "Counter": "0,1,2,3",
+ "UMask": "0x4",
+ "EventName": "L1D_WB_L2.E_STATE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L1 writebacks to L2 in E state"
+ },
+ {
+ "EventCode": "0x28",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "L1D_WB_L2.I_STATE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L1 writebacks to L2 in I state (misses)"
+ },
+ {
+ "EventCode": "0x28",
+ "Counter": "0,1,2,3",
+ "UMask": "0x8",
+ "EventName": "L1D_WB_L2.M_STATE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L1 writebacks to L2 in M state"
+ },
+ {
+ "EventCode": "0x28",
+ "Counter": "0,1,2,3",
+ "UMask": "0xf",
+ "EventName": "L1D_WB_L2.MESI",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "All L1 writebacks to L2"
+ },
+ {
+ "EventCode": "0x28",
+ "Counter": "0,1,2,3",
+ "UMask": "0x2",
+ "EventName": "L1D_WB_L2.S_STATE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L1 writebacks to L2 in S state"
+ },
+ {
+ "EventCode": "0x26",
+ "Counter": "0,1,2,3",
+ "UMask": "0xff",
+ "EventName": "L2_DATA_RQSTS.ANY",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "All L2 data requests"
+ },
+ {
+ "EventCode": "0x26",
+ "Counter": "0,1,2,3",
+ "UMask": "0x4",
+ "EventName": "L2_DATA_RQSTS.DEMAND.E_STATE",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 data demand loads in E state"
+ },
+ {
+ "EventCode": "0x26",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "L2_DATA_RQSTS.DEMAND.I_STATE",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 data demand loads in I state (misses)"
+ },
+ {
+ "EventCode": "0x26",
+ "Counter": "0,1,2,3",
+ "UMask": "0x8",
+ "EventName": "L2_DATA_RQSTS.DEMAND.M_STATE",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 data demand loads in M state"
+ },
+ {
+ "EventCode": "0x26",
+ "Counter": "0,1,2,3",
+ "UMask": "0xf",
+ "EventName": "L2_DATA_RQSTS.DEMAND.MESI",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 data demand requests"
+ },
+ {
+ "EventCode": "0x26",
+ "Counter": "0,1,2,3",
+ "UMask": "0x2",
+ "EventName": "L2_DATA_RQSTS.DEMAND.S_STATE",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 data demand loads in S state"
+ },
+ {
+ "EventCode": "0x26",
+ "Counter": "0,1,2,3",
+ "UMask": "0x40",
+ "EventName": "L2_DATA_RQSTS.PREFETCH.E_STATE",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 data prefetches in E state"
+ },
+ {
+ "EventCode": "0x26",
+ "Counter": "0,1,2,3",
+ "UMask": "0x10",
+ "EventName": "L2_DATA_RQSTS.PREFETCH.I_STATE",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 data prefetches in the I state (misses)"
+ },
+ {
+ "EventCode": "0x26",
+ "Counter": "0,1,2,3",
+ "UMask": "0x80",
+ "EventName": "L2_DATA_RQSTS.PREFETCH.M_STATE",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 data prefetches in M state"
+ },
+ {
+ "EventCode": "0x26",
+ "Counter": "0,1,2,3",
+ "UMask": "0xf0",
+ "EventName": "L2_DATA_RQSTS.PREFETCH.MESI",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "All L2 data prefetches"
+ },
+ {
+ "EventCode": "0x26",
+ "Counter": "0,1,2,3",
+ "UMask": "0x20",
+ "EventName": "L2_DATA_RQSTS.PREFETCH.S_STATE",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 data prefetches in the S state"
+ },
+ {
+ "EventCode": "0xF1",
+ "Counter": "0,1,2,3",
+ "UMask": "0x7",
+ "EventName": "L2_LINES_IN.ANY",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 lines alloacated"
+ },
+ {
+ "EventCode": "0xF1",
+ "Counter": "0,1,2,3",
+ "UMask": "0x4",
+ "EventName": "L2_LINES_IN.E_STATE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 lines allocated in the E state"
+ },
+ {
+ "EventCode": "0xF1",
+ "Counter": "0,1,2,3",
+ "UMask": "0x2",
+ "EventName": "L2_LINES_IN.S_STATE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 lines allocated in the S state"
+ },
+ {
+ "EventCode": "0xF2",
+ "Counter": "0,1,2,3",
+ "UMask": "0xf",
+ "EventName": "L2_LINES_OUT.ANY",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 lines evicted"
+ },
+ {
+ "EventCode": "0xF2",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "L2_LINES_OUT.DEMAND_CLEAN",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 lines evicted by a demand request"
+ },
+ {
+ "EventCode": "0xF2",
+ "Counter": "0,1,2,3",
+ "UMask": "0x2",
+ "EventName": "L2_LINES_OUT.DEMAND_DIRTY",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 modified lines evicted by a demand request"
+ },
+ {
+ "EventCode": "0xF2",
+ "Counter": "0,1,2,3",
+ "UMask": "0x4",
+ "EventName": "L2_LINES_OUT.PREFETCH_CLEAN",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 lines evicted by a prefetch request"
+ },
+ {
+ "EventCode": "0xF2",
+ "Counter": "0,1,2,3",
+ "UMask": "0x8",
+ "EventName": "L2_LINES_OUT.PREFETCH_DIRTY",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 modified lines evicted by a prefetch request"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0x10",
+ "EventName": "L2_RQSTS.IFETCH_HIT",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 instruction fetch hits"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0x20",
+ "EventName": "L2_RQSTS.IFETCH_MISS",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 instruction fetch misses"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0x30",
+ "EventName": "L2_RQSTS.IFETCHES",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 instruction fetches"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "L2_RQSTS.LD_HIT",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 load hits"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0x2",
+ "EventName": "L2_RQSTS.LD_MISS",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 load misses"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0x3",
+ "EventName": "L2_RQSTS.LOADS",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 requests"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0xaa",
+ "EventName": "L2_RQSTS.MISS",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "All L2 misses"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0x40",
+ "EventName": "L2_RQSTS.PREFETCH_HIT",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 prefetch hits"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0x80",
+ "EventName": "L2_RQSTS.PREFETCH_MISS",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 prefetch misses"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0xc0",
+ "EventName": "L2_RQSTS.PREFETCHES",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "All L2 prefetches"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0xff",
+ "EventName": "L2_RQSTS.REFERENCES",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "All L2 requests"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0x4",
+ "EventName": "L2_RQSTS.RFO_HIT",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 RFO hits"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0x8",
+ "EventName": "L2_RQSTS.RFO_MISS",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 RFO misses"
+ },
+ {
+ "EventCode": "0x24",
+ "Counter": "0,1,2,3",
+ "UMask": "0xc",
+ "EventName": "L2_RQSTS.RFOS",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 RFO requests"
+ },
+ {
+ "EventCode": "0xF0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x80",
+ "EventName": "L2_TRANSACTIONS.ANY",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "All L2 transactions"
+ },
+ {
+ "EventCode": "0xF0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x20",
+ "EventName": "L2_TRANSACTIONS.FILL",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 fill transactions"
+ },
+ {
+ "EventCode": "0xF0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x4",
+ "EventName": "L2_TRANSACTIONS.IFETCH",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 instruction fetch transactions"
+ },
+ {
+ "EventCode": "0xF0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x10",
+ "EventName": "L2_TRANSACTIONS.L1D_WB",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L1D writeback to L2 transactions"
+ },
+ {
+ "EventCode": "0xF0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "L2_TRANSACTIONS.LOAD",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 Load transactions"
+ },
+ {
+ "EventCode": "0xF0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x8",
+ "EventName": "L2_TRANSACTIONS.PREFETCH",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 prefetch transactions"
+ },
+ {
+ "EventCode": "0xF0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x2",
+ "EventName": "L2_TRANSACTIONS.RFO",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 RFO transactions"
+ },
+ {
+ "EventCode": "0xF0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x40",
+ "EventName": "L2_TRANSACTIONS.WB",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "L2 writeback to LLC transactions"
+ },
+ {
+ "EventCode": "0x27",
+ "Counter": "0,1,2,3",
+ "UMask": "0x40",
+ "EventName": "L2_WRITE.LOCK.E_STATE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 demand lock RFOs in E state"
+ },
+ {
+ "EventCode": "0x27",
+ "Counter": "0,1,2,3",
+ "UMask": "0xe0",
+ "EventName": "L2_WRITE.LOCK.HIT",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "All demand L2 lock RFOs that hit the cache"
+ },
+ {
+ "EventCode": "0x27",
+ "Counter": "0,1,2,3",
+ "UMask": "0x10",
+ "EventName": "L2_WRITE.LOCK.I_STATE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 demand lock RFOs in I state (misses)"
+ },
+ {
+ "EventCode": "0x27",
+ "Counter": "0,1,2,3",
+ "UMask": "0x80",
+ "EventName": "L2_WRITE.LOCK.M_STATE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 demand lock RFOs in M state"
+ },
+ {
+ "EventCode": "0x27",
+ "Counter": "0,1,2,3",
+ "UMask": "0xf0",
+ "EventName": "L2_WRITE.LOCK.MESI",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "All demand L2 lock RFOs"
+ },
+ {
+ "EventCode": "0x27",
+ "Counter": "0,1,2,3",
+ "UMask": "0x20",
+ "EventName": "L2_WRITE.LOCK.S_STATE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 demand lock RFOs in S state"
+ },
+ {
+ "EventCode": "0x27",
+ "Counter": "0,1,2,3",
+ "UMask": "0xe",
+ "EventName": "L2_WRITE.RFO.HIT",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "All L2 demand store RFOs that hit the cache"
+ },
+ {
+ "EventCode": "0x27",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "L2_WRITE.RFO.I_STATE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 demand store RFOs in I state (misses)"
+ },
+ {
+ "EventCode": "0x27",
+ "Counter": "0,1,2,3",
+ "UMask": "0x8",
+ "EventName": "L2_WRITE.RFO.M_STATE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 demand store RFOs in M state"
+ },
+ {
+ "EventCode": "0x27",
+ "Counter": "0,1,2,3",
+ "UMask": "0xf",
+ "EventName": "L2_WRITE.RFO.MESI",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "All L2 demand store RFOs"
+ },
+ {
+ "EventCode": "0x27",
+ "Counter": "0,1,2,3",
+ "UMask": "0x2",
+ "EventName": "L2_WRITE.RFO.S_STATE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "L2 demand store RFOs in S state"
+ },
+ {
+ "EventCode": "0x2E",
+ "Counter": "0,1,2,3",
+ "UMask": "0x41",
+ "EventName": "LONGEST_LAT_CACHE.MISS",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "Longest latency cache miss"
+ },
+ {
+ "EventCode": "0x2E",
+ "Counter": "0,1,2,3",
+ "UMask": "0x4f",
+ "EventName": "LONGEST_LAT_CACHE.REFERENCE",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "Longest latency cache reference"
+ },
+ {
+ "PEBS": "1",
+ "EventCode": "0xB",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "MEM_INST_RETIRED.LOADS",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Instructions retired which contains a load (Precise Event)"
+ },
+ {
+ "PEBS": "1",
+ "EventCode": "0xB",
+ "Counter": "0,1,2,3",
+ "UMask": "0x2",
+ "EventName": "MEM_INST_RETIRED.STORES",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Instructions retired which contains a store (Precise Event)"
+ },
+ {
+ "PEBS": "1",
+ "EventCode": "0xCB",
+ "Counter": "0,1,2,3",
+ "UMask": "0x40",
+ "EventName": "MEM_LOAD_RETIRED.HIT_LFB",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "Retired loads that miss L1D and hit an previously allocated LFB (Precise Event)"
+ },
+ {
+ "PEBS": "1",
+ "EventCode": "0xCB",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "MEM_LOAD_RETIRED.L1D_HIT",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Retired loads that hit the L1 data cache (Precise Event)"
+ },
+ {
+ "PEBS": "1",
+ "EventCode": "0xCB",
+ "Counter": "0,1,2,3",
+ "UMask": "0x2",
+ "EventName": "MEM_LOAD_RETIRED.L2_HIT",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "Retired loads that hit the L2 cache (Precise Event)"
+ },
+ {
+ "PEBS": "1",
+ "EventCode": "0xCB",
+ "Counter": "0,1,2,3",
+ "UMask": "0x10",
+ "EventName": "MEM_LOAD_RETIRED.LLC_MISS",
+ "SampleAfterValue": "10000",
+ "BriefDescription": "Retired loads that miss the LLC cache (Precise Event)"
+ },
+ {
+ "PEBS": "1",
+ "EventCode": "0xCB",
+ "Counter": "0,1,2,3",
+ "UMask": "0x4",
+ "EventName": "MEM_LOAD_RETIRED.LLC_UNSHARED_HIT",
+ "SampleAfterValue": "40000",
+ "BriefDescription": "Retired loads that hit valid versions in the LLC cache (Precise Event)"
+ },
+ {
+ "PEBS": "1",
+ "EventCode": "0xCB",
+ "Counter": "0,1,2,3",
+ "UMask": "0x8",
+ "EventName": "MEM_LOAD_RETIRED.OTHER_CORE_L2_HIT_HITM",
+ "SampleAfterValue": "40000",
+ "BriefDescription": "Retired loads that hit sibling core's L2 in modified or unmodified states (Precise Event)"
+ },
+ {
+ "EventCode": "0xB0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x80",
+ "EventName": "OFFCORE_REQUESTS.ANY",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "All offcore requests"
+ },
+ {
+ "EventCode": "0xB0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x8",
+ "EventName": "OFFCORE_REQUESTS.ANY.READ",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "Offcore read requests"
+ },
+ {
+ "EventCode": "0xB0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x10",
+ "EventName": "OFFCORE_REQUESTS.ANY.RFO",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "Offcore RFO requests"
+ },
+ {
+ "EventCode": "0xB0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x2",
+ "EventName": "OFFCORE_REQUESTS.DEMAND.READ_CODE",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "Offcore demand code read requests"
+ },
+ {
+ "EventCode": "0xB0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_REQUESTS.DEMAND.READ_DATA",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "Offcore demand data read requests"
+ },
+ {
+ "EventCode": "0xB0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x4",
+ "EventName": "OFFCORE_REQUESTS.DEMAND.RFO",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "Offcore demand RFO requests"
+ },
+ {
+ "EventCode": "0xB0",
+ "Counter": "0,1,2,3",
+ "UMask": "0x40",
+ "EventName": "OFFCORE_REQUESTS.L1D_WRITEBACK",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "Offcore L1 data cache writebacks"
+ },
+ {
+ "EventCode": "0x60",
+ "UMask": "0x8",
+ "EventName": "OFFCORE_REQUESTS_OUTSTANDING.ANY.READ",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Outstanding offcore reads"
+ },
+ {
+ "EventCode": "0x60",
+ "UMask": "0x8",
+ "EventName": "OFFCORE_REQUESTS_OUTSTANDING.ANY.READ_NOT_EMPTY",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Cycles offcore reads busy",
+ "CounterMask": "1"
+ },
+ {
+ "EventCode": "0x60",
+ "UMask": "0x2",
+ "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_CODE",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Outstanding offcore demand code reads"
+ },
+ {
+ "EventCode": "0x60",
+ "UMask": "0x2",
+ "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_CODE_NOT_EMPTY",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Cycles offcore demand code read busy",
+ "CounterMask": "1"
+ },
+ {
+ "EventCode": "0x60",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_DATA",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Outstanding offcore demand data reads"
+ },
+ {
+ "EventCode": "0x60",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND.READ_DATA_NOT_EMPTY",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Cycles offcore demand data read busy",
+ "CounterMask": "1"
+ },
+ {
+ "EventCode": "0x60",
+ "UMask": "0x4",
+ "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND.RFO",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Outstanding offcore demand RFOs"
+ },
+ {
+ "EventCode": "0x60",
+ "UMask": "0x4",
+ "EventName": "OFFCORE_REQUESTS_OUTSTANDING.DEMAND.RFO_NOT_EMPTY",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Cycles offcore demand RFOs busy",
+ "CounterMask": "1"
+ },
+ {
+ "EventCode": "0xB2",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_REQUESTS_SQ_FULL",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "Offcore requests blocked due to Super Queue full"
+ },
+ {
+ "EventCode": "0xF4",
+ "Counter": "0,1,2,3",
+ "UMask": "0x4",
+ "EventName": "SQ_MISC.LRU_HINTS",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Super Queue LRU hints sent to LLC"
+ },
+ {
+ "EventCode": "0xF4",
+ "Counter": "0,1,2,3",
+ "UMask": "0x10",
+ "EventName": "SQ_MISC.SPLIT_LOCK",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Super Queue lock splits across a cache line"
+ },
+ {
+ "EventCode": "0x6",
+ "Counter": "0,1,2,3",
+ "UMask": "0x4",
+ "EventName": "STORE_BLOCKS.AT_RET",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "Loads delayed with at-Retirement block code"
+ },
+ {
+ "EventCode": "0x6",
+ "Counter": "0,1,2,3",
+ "UMask": "0x8",
+ "EventName": "STORE_BLOCKS.L1D_BLOCK",
+ "SampleAfterValue": "200000",
+ "BriefDescription": "Cacheable loads delayed with L1D block code"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x0",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_0",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "2000000",
+ "BriefDescription": "Memory instructions retired above 0 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x400",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_1024",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "100",
+ "BriefDescription": "Memory instructions retired above 1024 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x80",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_128",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "1000",
+ "BriefDescription": "Memory instructions retired above 128 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x10",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_16",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "10000",
+ "BriefDescription": "Memory instructions retired above 16 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x4000",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_16384",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "5",
+ "BriefDescription": "Memory instructions retired above 16384 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x800",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_2048",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "50",
+ "BriefDescription": "Memory instructions retired above 2048 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x100",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_256",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "500",
+ "BriefDescription": "Memory instructions retired above 256 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x20",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_32",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "5000",
+ "BriefDescription": "Memory instructions retired above 32 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x8000",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_32768",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "3",
+ "BriefDescription": "Memory instructions retired above 32768 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x4",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_4",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "50000",
+ "BriefDescription": "Memory instructions retired above 4 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x1000",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_4096",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "20",
+ "BriefDescription": "Memory instructions retired above 4096 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x200",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_512",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "200",
+ "BriefDescription": "Memory instructions retired above 512 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x40",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_64",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "2000",
+ "BriefDescription": "Memory instructions retired above 64 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x8",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_8",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "20000",
+ "BriefDescription": "Memory instructions retired above 8 clocks (Precise Event)"
+ },
+ {
+ "PEBS": "2",
+ "EventCode": "0xB",
+ "MSRValue": "0x2000",
+ "Counter": "3",
+ "UMask": "0x10",
+ "EventName": "MEM_INST_RETIRED.LATENCY_ABOVE_THRESHOLD_8192",
+ "MSRIndex": "0x3F6",
+ "SampleAfterValue": "10",
+ "BriefDescription": "Memory instructions retired above 8192 clocks (Precise Event)"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5011",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_DATA.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f11",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_DATA.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff11",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_DATA.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8011",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_DATA.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x111",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_DATA.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x211",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_DATA.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x411",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_DATA.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x711",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_DATA.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1011",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_DATA.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x811",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_DATA.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_DATA read and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5044",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY IFETCH and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f44",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY IFETCH and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff44",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY IFETCH and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8044",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY IFETCH and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x144",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY IFETCH and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x244",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY IFETCH and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x444",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY IFETCH and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x744",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY IFETCH and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1044",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY IFETCH and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x844",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_IFETCH.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY IFETCH and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x50ff",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_REQUEST and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7fff",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_REQUEST and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xffff",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_REQUEST and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x80ff",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_REQUEST and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1ff",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_REQUEST and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x2ff",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_REQUEST and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x4ff",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_REQUEST and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7ff",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_REQUEST and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x10ff",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_REQUEST and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8ff",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_REQUEST.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY_REQUEST and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5022",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_RFO.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY RFO and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f22",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_RFO.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY RFO and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff22",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_RFO.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY RFO and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8022",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_RFO.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY RFO and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x122",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_RFO.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY RFO and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x222",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_RFO.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY RFO and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x422",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_RFO.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY RFO and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x722",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_RFO.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY RFO and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1022",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_RFO.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY RFO and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x822",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.ANY_RFO.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = ANY RFO and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5008",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.COREWB.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = CORE_WB and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f08",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.COREWB.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = CORE_WB and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff08",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.COREWB.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = CORE_WB and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8008",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.COREWB.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = CORE_WB and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x108",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.COREWB.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = CORE_WB and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x208",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.COREWB.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = CORE_WB and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x408",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.COREWB.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = CORE_WB and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x708",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.COREWB.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = CORE_WB and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1008",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.COREWB.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = CORE_WB and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x808",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.COREWB.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = CORE_WB and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5077",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IFETCH and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f77",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IFETCH and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff77",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IFETCH and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8077",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IFETCH and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x177",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IFETCH and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x277",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IFETCH and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x477",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IFETCH and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x777",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IFETCH and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1077",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IFETCH and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x877",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IFETCH.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IFETCH and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5033",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IN.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IN and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f33",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IN.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IN and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff33",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IN.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IN and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8033",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IN.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IN and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x133",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IN.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IN and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x233",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IN.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IN and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x433",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IN.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IN and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x733",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IN.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IN and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1033",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IN.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IN and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x833",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DATA_IN.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DATA_IN and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5003",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f03",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff03",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8003",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x103",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x203",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x403",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x703",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1003",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x803",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5001",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA_RD and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f01",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA_RD and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff01",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA_RD and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8001",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA_RD and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x101",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA_RD and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x201",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA_RD and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x401",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA_RD and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x701",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA_RD and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1001",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA_RD and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x801",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_DATA_RD and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5004",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_IFETCH and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f04",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_IFETCH and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff04",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_IFETCH and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8004",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_IFETCH and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x104",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_IFETCH and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x204",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_IFETCH and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x404",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_IFETCH and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x704",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_IFETCH and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1004",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_IFETCH and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x804",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_IFETCH.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_IFETCH and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5002",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_RFO and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f02",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_RFO and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff02",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_RFO and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8002",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_RFO and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x102",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_RFO and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x202",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_RFO and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x402",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_RFO and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x702",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_RFO and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1002",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_RFO and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x802",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.DEMAND_RFO.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = DEMAND_RFO and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5080",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.OTHER.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = OTHER and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f80",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.OTHER.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = OTHER and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff80",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.OTHER.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = OTHER and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8080",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.OTHER.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = OTHER and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x180",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.OTHER.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = OTHER and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x280",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.OTHER.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = OTHER and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x480",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.OTHER.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = OTHER and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x780",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.OTHER.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = OTHER and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1080",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.OTHER.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = OTHER and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x880",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.OTHER.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = OTHER and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5050",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f50",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff50",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8050",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x150",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x250",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x450",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x750",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1050",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x850",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5010",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA_RD and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f10",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA_RD and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff10",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA_RD and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8010",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA_RD and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x110",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA_RD and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x210",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA_RD and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x410",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA_RD and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x710",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA_RD and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1010",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA_RD and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x810",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_DATA_RD.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_DATA_RD and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5040",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_IFETCH.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_RFO and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f40",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_IFETCH.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_RFO and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff40",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_IFETCH.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_RFO and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8040",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_IFETCH.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_RFO and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x140",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_IFETCH.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_RFO and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x240",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_IFETCH.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_RFO and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x440",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_IFETCH.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_RFO and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x740",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_IFETCH.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_RFO and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1040",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_IFETCH.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_RFO and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x840",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_IFETCH.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_RFO and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5020",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_RFO.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_IFETCH and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f20",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_RFO.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_IFETCH and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff20",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_RFO.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_IFETCH and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8020",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_RFO.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_IFETCH and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x120",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_RFO.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_IFETCH and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x220",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_RFO.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_IFETCH and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x420",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_RFO.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_IFETCH and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x720",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_RFO.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_IFETCH and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1020",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_RFO.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_IFETCH and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x820",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PF_RFO.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PF_IFETCH and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x5070",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PREFETCH.ALL_LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PREFETCH and RESPONSE = ALL_LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x7f70",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PREFETCH.ANY_CACHE_DRAM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PREFETCH and RESPONSE = ANY_CACHE_DRAM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0xff70",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PREFETCH.ANY_LOCATION",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PREFETCH and RESPONSE = ANY_LOCATION",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x8070",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PREFETCH.IO_CSR_MMIO",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PREFETCH and RESPONSE = IO_CSR_MMIO",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x170",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PREFETCH.LLC_HIT_NO_OTHER_CORE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PREFETCH and RESPONSE = LLC_HIT_NO_OTHER_CORE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x270",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PREFETCH.LLC_HIT_OTHER_CORE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PREFETCH and RESPONSE = LLC_HIT_OTHER_CORE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x470",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PREFETCH.LLC_HIT_OTHER_CORE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PREFETCH and RESPONSE = LLC_HIT_OTHER_CORE_HITM",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x770",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PREFETCH.LOCAL_CACHE",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PREFETCH and RESPONSE = LOCAL_CACHE",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x1070",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PREFETCH.LOCAL_DRAM_AND_REMOTE_CACHE_HIT",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PREFETCH and RESPONSE = LOCAL_DRAM AND REMOTE_CACHE_HIT",
+ "Offcore": "1"
+ },
+ {
+ "EventCode": "0xB7, 0xBB",
+ "MSRValue": "0x870",
+ "Counter": "0,1,2,3",
+ "UMask": "0x1",
+ "EventName": "OFFCORE_RESPONSE.PREFETCH.REMOTE_CACHE_HITM",
+ "MSRIndex": "0x1a6,0x1a7",
+ "SampleAfterValue": "100000",
+ "BriefDescription": "REQUEST = PREFETCH and RESPONSE = REMOTE_CACHE_HITM",
+ "Offcore": "1"
+ }
+] \ No newline at end of file