From 5d1646d90e1f2cceb9f0828f4b28318cd0ec7744 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sat, 27 Apr 2024 12:05:51 +0200 Subject: Adding upstream version 5.10.209. Signed-off-by: Daniel Baumann --- arch/arm/boot/dts/s3c6400.dtsi | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 arch/arm/boot/dts/s3c6400.dtsi (limited to 'arch/arm/boot/dts/s3c6400.dtsi') diff --git a/arch/arm/boot/dts/s3c6400.dtsi b/arch/arm/boot/dts/s3c6400.dtsi new file mode 100644 index 000000000..8c28e8a0c --- /dev/null +++ b/arch/arm/boot/dts/s3c6400.dtsi @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Samsung's S3C6400 SoC device tree source + * + * Copyright (c) 2013 Tomasz Figa + * + * Samsung's S3C6400 SoC device nodes are listed in this file. S3C6400 + * based board files can include this file and provide values for board specfic + * bindings. + * + * Note: This file does not include device nodes for all the controllers in + * S3C6400 SoC. As device tree coverage for S3C6400 increases, additional + * nodes can be added to this file. + */ + +#include "s3c64xx.dtsi" + +/ { + compatible = "samsung,s3c6400"; +}; + +&vic0 { + valid-mask = <0xfffffe1f>; + valid-wakeup-mask = <0x00200004>; +}; + +&vic1 { + valid-mask = <0xffffffff>; + valid-wakeup-mask = <0x53020000>; +}; + +&soc { + clocks: clock-controller@7e00f000 { + compatible = "samsung,s3c6400-clock"; + reg = <0x7e00f000 0x1000>; + #clock-cells = <1>; + }; +}; -- cgit v1.2.3