// SPDX-License-Identifier: GPL-2.0 /* * Device Tree Source for the V3M Starter Kit board * * Copyright (C) 2017 Renesas Electronics Corp. * Copyright (C) 2017 Cogent Embedded, Inc. */ /dts-v1/; #include "r8a77970.dtsi" / { model = "Renesas V3M Starter Kit board"; compatible = "renesas,v3msk", "renesas,r8a77970"; aliases { serial0 = &scif0; }; chosen { stdout-path = "serial0:115200n8"; }; hdmi-out { compatible = "hdmi-connector"; type = "a"; port { hdmi_con: endpoint { remote-endpoint = <&adv7511_out>; }; }; }; lvds-decoder { compatible = "thine,thc63lvd1024"; vcc-supply = <&vcc_d3_3v>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; thc63lvd1024_in: endpoint { remote-endpoint = <&lvds0_out>; }; }; port@2 { reg = <2>; thc63lvd1024_out: endpoint { remote-endpoint = <&adv7511_in>; }; }; }; }; memory@48000000 { device_type = "memory"; /* first 128MB is reserved for secure area. */ reg = <0x0 0x48000000 0x0 0x78000000>; }; osc5_clk: osc5-clock { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <148500000>; }; vcc_d1_8v: regulator-0 { compatible = "regulator-fixed"; regulator-name = "VCC_D1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; vcc_d3_3v: regulator-1 { compatible = "regulator-fixed"; regulator-name = "VCC_D3.3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; vcc_vddq_vin0: regulator-2 { compatible = "regulator-fixed"; regulator-name = "VCC_VDDQ_VIN0"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; }; &avb { pinctrl-0 = <&avb_pins>; pinctrl-names = "default"; renesas,no-ether-link; phy-handle = <&phy0>; phy-mode = "rgmii-id"; status = "okay"; phy0: ethernet-phy@0 { rxc-skew-ps = <1500>; reg = <0>; interrupt-parent = <&gpio1>; interrupts = <17 IRQ_TYPE_LEVEL_LOW>; }; }; &du { clocks = <&cpg CPG_MOD 724>, <&osc5_clk>; clock-names = "du.0", "dclkin.0"; status = "okay"; }; &extal_clk { clock-frequency = <16666666>; }; &extalr_clk { clock-frequency = <32768>; }; &i2c0 { pinctrl-0 = <&i2c0_pins>; pinctrl-names = "default"; status = "okay"; clock-frequency = <400000>; hdmi@39{ compatible = "adi,adv7511w"; #sound-dai-cells = <0>; reg = <0x39>; interrupt-parent = <&gpio1>; interrupts = <20 IRQ_TYPE_LEVEL_LOW>; avdd-supply = <&vcc_d1_8v>; dvdd-supply = <&vcc_d1_8v>; pvdd-supply = <&vcc_d1_8v>; bgvdd-supply = <&vcc_d1_8v>; dvdd-3v-supply = <&vcc_d3_3v>; adi,input-depth = <8>; adi,input-colorspace = "rgb"; adi,input-clock = "1x"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; adv7511_in: endpoint { remote-endpoint = <&thc63lvd1024_out>; }; }; port@1 { reg = <1>; adv7511_out: endpoint { remote-endpoint = <&hdmi_con>; }; }; }; }; }; &lvds0 { status = "okay"; ports { port@1 { lvds0_out: endpoint { remote-endpoint = <&thc63lvd1024_in>; }; }; }; }; &mmc0 { pinctrl-0 = <&mmc_pins>; pinctrl-names = "default"; vmmc-supply = <&vcc_d3_3v>; vqmmc-supply = <&vcc_vddq_vin0>; bus-width = <8>; non-removable; status = "okay"; }; &pfc { avb_pins: avb0 { groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk"; function = "avb0"; }; i2c0_pins: i2c0 { groups = "i2c0"; function = "i2c0"; }; mmc_pins: mmc_3_3v { groups = "mmc_data8", "mmc_ctrl"; function = "mmc"; power-source = <3300>; }; qspi0_pins: qspi0 { groups = "qspi0_ctrl", "qspi0_data4"; function = "qspi0"; }; scif0_pins: scif0 { groups = "scif0_data"; function = "scif0"; }; }; &rpc { pinctrl-0 = <&qspi0_pins>; pinctrl-names = "default"; status = "okay"; flash@0 { compatible = "spansion,s25fs512s", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <50000000>; spi-rx-bus-width = <4>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; bootparam@0 { reg = <0x00000000 0x040000>; read-only; }; cr7@40000 { reg = <0x00040000 0x080000>; read-only; }; cert_header_sa3@c0000 { reg = <0x000c0000 0x080000>; read-only; }; bl2@140000 { reg = <0x00140000 0x040000>; read-only; }; cert_header_sa6@180000 { reg = <0x00180000 0x040000>; read-only; }; bl31@1c0000 { reg = <0x001c0000 0x460000>; read-only; }; uboot@640000 { reg = <0x00640000 0x0c0000>; read-only; }; uboot-env@700000 { reg = <0x00700000 0x040000>; read-only; }; dtb@740000 { reg = <0x00740000 0x080000>; }; kernel@7c0000 { reg = <0x007c0000 0x1400000>; }; user@1bc0000 { reg = <0x01bc0000 0x2440000>; }; }; }; }; &scif0 { pinctrl-0 = <&scif0_pins>; pinctrl-names = "default"; status = "okay"; };