[ { "BriefDescription": "Uncore cache clock ticks", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventName": "UNC_CHA_CLOCKTICKS", "PerPkg": "1", "Unit": "CHA" }, { "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.ia_miss", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", "EventName": "LLC_MISSES.UNCACHEABLE", "Filter": "config1=0x40e33", "PerPkg": "1", "UMask": "0xC001FE01", "UMaskExt": "0xC001FE", "Unit": "CHA" }, { "BriefDescription": "MMIO reads. Derived from unc_cha_tor_inserts.ia_miss", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", "EventName": "LLC_MISSES.MMIO_READ", "Filter": "config1=0x40040e33", "PerPkg": "1", "UMask": "0xC001FE01", "UMaskExt": "0xC001FE", "Unit": "CHA" }, { "BriefDescription": "MMIO writes. Derived from unc_cha_tor_inserts.ia_miss", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", "EventName": "LLC_MISSES.MMIO_WRITE", "Filter": "config1=0x40041e33", "PerPkg": "1", "UMask": "0xC001FE01", "UMaskExt": "0xC001FE", "Unit": "CHA" }, { "BriefDescription": "Streaming stores (full cache line). Derived from unc_cha_tor_inserts.ia_miss", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", "EventName": "LLC_REFERENCES.STREAMING_FULL", "Filter": "config1=0x41833", "PerPkg": "1", "ScaleUnit": "64Bytes", "UMask": "0xC001FE01", "UMaskExt": "0xC001FE", "Unit": "CHA" }, { "BriefDescription": "Streaming stores (partial cache line). Derived from unc_cha_tor_inserts.ia_miss", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", "EventName": "LLC_REFERENCES.STREAMING_PARTIAL", "Filter": "config1=0x41a33", "PerPkg": "1", "ScaleUnit": "64Bytes", "UMask": "0xC001FE01", "UMaskExt": "0xC001FE", "Unit": "CHA" }, { "BriefDescription": "PCI Express bandwidth reading at IIO. Derived from unc_iio_data_req_of_cpu.mem_read.part0", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "LLC_MISSES.PCIE_READ", "FCMask": "0x07", "Filter": "ch_mask=0x1f", "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0 +UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1 +UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2 +UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", "MetricName": "LLC_MISSES.PCIE_READ", "PerPkg": "1", "PortMask": "0x01", "ScaleUnit": "4Bytes", "UMask": "0x04", "Unit": "IIO" }, { "BriefDescription": "PCI Express bandwidth writing at IIO. Derived from unc_iio_data_req_of_cpu.mem_write.part0", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "LLC_MISSES.PCIE_WRITE", "FCMask": "0x07", "Filter": "ch_mask=0x1f", "MetricExpr": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0 +UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1 +UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2 +UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", "MetricName": "LLC_MISSES.PCIE_WRITE", "PerPkg": "1", "PortMask": "0x01", "ScaleUnit": "4Bytes", "UMask": "0x01", "Unit": "IIO" }, { "BriefDescription": "PCI Express bandwidth writing at IIO, part 1", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x02", "ScaleUnit": "4Bytes", "UMask": "0x01", "Unit": "IIO" }, { "BriefDescription": "PCI Express bandwidth writing at IIO, part 2", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x04", "ScaleUnit": "4Bytes", "UMask": "0x01", "Unit": "IIO" }, { "BriefDescription": "PCI Express bandwidth writing at IIO, part 3", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x08", "ScaleUnit": "4Bytes", "UMask": "0x01", "Unit": "IIO" }, { "BriefDescription": "PCI Express bandwidth reading at IIO, part 1", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x02", "ScaleUnit": "4Bytes", "UMask": "0x04", "Unit": "IIO" }, { "BriefDescription": "PCI Express bandwidth reading at IIO, part 2", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x04", "ScaleUnit": "4Bytes", "UMask": "0x04", "Unit": "IIO" }, { "BriefDescription": "PCI Express bandwidth reading at IIO, part 3", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x08", "ScaleUnit": "4Bytes", "UMask": "0x04", "Unit": "IIO" }, { "BriefDescription": "TOR Inserts; CRd misses from local IA", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD", "PerPkg": "1", "PublicDescription": "TOR Inserts; Code read from local IA that misses in the snoop filter", "UMask": "0xC80FFE01", "UMaskExt": "0xC80FFE", "Unit": "CHA" }, { "BriefDescription": "TOR Inserts; CRd Pref misses from local IA", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_CRD_PREF", "PerPkg": "1", "PublicDescription": "TOR Inserts; Code read prefetch from local IA that misses in the snoop filter", "UMask": "0xC88FFE01", "UMaskExt": "0xC88FFE", "Unit": "CHA" }, { "BriefDescription": "TOR Inserts; DRd Opt misses from local IA", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT", "PerPkg": "1", "PublicDescription": "TOR Inserts; Data read opt from local IA that misses in the snoop filter", "UMask": "0xC827FE01", "UMaskExt": "0xC827FE", "Unit": "CHA" }, { "BriefDescription": "TOR Inserts; DRd Opt Pref misses from local IA", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_DRD_OPT_PREF", "PerPkg": "1", "PublicDescription": "TOR Inserts; Data read opt prefetch from local IA that misses in the snoop filter", "UMask": "0xC8A7FE01", "UMaskExt": "0xC8A7FE", "Unit": "CHA" }, { "BriefDescription": "TOR Inserts; RFO misses from local IA", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO", "PerPkg": "1", "PublicDescription": "TOR Inserts; Read for ownership from local IA that misses in the snoop filter", "UMask": "0xC807FE01", "UMaskExt": "0xC807FE", "Unit": "CHA" }, { "BriefDescription": "TOR Inserts; RFO pref misses from local IA", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_RFO_PREF", "PerPkg": "1", "PublicDescription": "TOR Inserts; Read for ownership prefetch from local IA that misses in the snoop filter", "UMask": "0xC887FE01", "UMaskExt": "0xC887FE", "Unit": "CHA" }, { "BriefDescription": "TOR Inserts; WCiL misses from local IA", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCIL", "PerPkg": "1", "PublicDescription": "TOR Inserts; Data read from local IA that misses in the snoop filter", "UMask": "0xC86FFE01", "UMaskExt": "0xC86FFE", "Unit": "CHA" }, { "BriefDescription": "TOR Inserts; WCiLF misses from local IA", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x35", "EventName": "UNC_CHA_TOR_INSERTS.IA_MISS_WCILF", "PerPkg": "1", "PublicDescription": "TOR Inserts; Data read from local IA that misses in the snoop filter", "UMask": "0xC867FE01", "UMaskExt": "0xC867FE", "Unit": "CHA" }, { "BriefDescription": "Clockticks of the integrated IO (IIO) traffic controller", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x01", "EventName": "UNC_IIO_CLOCKTICKS", "PerPkg": "1", "PublicDescription": "Clockticks of the integrated IO (IIO) traffic controller", "Unit": "IIO" }, { "BriefDescription": "Data requested of the CPU : Card reading from DRAM", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART4", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x10", "PublicDescription": "Data requested of the CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", "UMask": "0x04", "Unit": "IIO" }, { "BriefDescription": "Data requested of the CPU : Card reading from DRAM", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART5", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x20", "PublicDescription": "Data requested of the CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", "UMask": "0x04", "Unit": "IIO" }, { "BriefDescription": "Data requested of the CPU : Card reading from DRAM", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART6", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x40", "PublicDescription": "Data requested of the CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", "UMask": "0x04", "Unit": "IIO" }, { "BriefDescription": "Data requested of the CPU : Card reading from DRAM", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART7", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x80", "PublicDescription": "Data requested of the CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", "UMask": "0x04", "Unit": "IIO" }, { "BriefDescription": "Data requested of the CPU : Card writing to DRAM", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART4", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x10", "PublicDescription": "Data requested of the CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x16 card plugged in to stack, Or x8 card plugged in to Lane 0/1, Or x4 card is plugged in to slot 0", "UMask": "0x01", "Unit": "IIO" }, { "BriefDescription": "Data requested of the CPU : Card writing to DRAM", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART5", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x20", "PublicDescription": "Data requested of the CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 1", "UMask": "0x01", "Unit": "IIO" }, { "BriefDescription": "Data requested of the CPU : Card writing to DRAM", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART6", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x40", "PublicDescription": "Data requested of the CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x8 card plugged in to Lane 2/3, Or x4 card is plugged in to slot 1", "UMask": "0x01", "Unit": "IIO" }, { "BriefDescription": "Data requested of the CPU : Card writing to DRAM", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x83", "EventName": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART7", "FCMask": "0x07", "PerPkg": "1", "PortMask": "0x80", "PublicDescription": "Data requested of the CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Includes all requests initiated by the Card, including reads and writes. : x4 card is plugged in to slot 3", "UMask": "0x01", "Unit": "IIO" }, { "BriefDescription": "Clockticks of the IO coherency tracker (IRP)", "Counter": "0,1", "CounterType": "PGMABLE", "EventCode": "0x01", "EventName": "UNC_I_CLOCKTICKS", "PerPkg": "1", "PublicDescription": "Clockticks of the IO coherency tracker (IRP)", "Unit": "IRP" }, { "BriefDescription": "Clockticks of the mesh to memory (M2M)", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventName": "UNC_M2M_CLOCKTICKS", "PerPkg": "1", "PublicDescription": "Clockticks of the mesh to memory (M2M)", "Unit": "M2M" }, { "BriefDescription": "Clockticks of the mesh to PCI (M2P)", "Counter": "0,1,2,3", "CounterType": "PGMABLE", "EventCode": "0x01", "EventName": "UNC_M2P_CLOCKTICKS", "PerPkg": "1", "PublicDescription": "Clockticks of the mesh to PCI (M2P)", "Unit": "M2PCIe" }, { "BriefDescription": "Clockticks in the UBOX using a dedicated 48-bit Fixed Counter", "Counter": "FIXED", "CounterType": "PGMABLE", "EventCode": "0xff", "EventName": "UNC_U_CLOCKTICKS", "PerPkg": "1", "PublicDescription": "Clockticks in the UBOX using a dedicated 48-bit Fixed Counter", "Unit": "UBOX" } ]