summaryrefslogtreecommitdiffstats
path: root/tools/testing/selftests/bpf/verifier/basic_instr.c
blob: 071dbc889e8c6fbffc8a7c9e80edc81f0233d72c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
{
	"add+sub+mul",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_1, 1),
	BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, 2),
	BPF_MOV64_IMM(BPF_REG_2, 3),
	BPF_ALU64_REG(BPF_SUB, BPF_REG_1, BPF_REG_2),
	BPF_ALU64_IMM(BPF_ADD, BPF_REG_1, -1),
	BPF_ALU64_IMM(BPF_MUL, BPF_REG_1, 3),
	BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = -3,
},
{
	"xor32 zero extend check",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_2, -1),
	BPF_ALU64_IMM(BPF_LSH, BPF_REG_2, 32),
	BPF_ALU64_IMM(BPF_OR, BPF_REG_2, 0xffff),
	BPF_ALU32_REG(BPF_XOR, BPF_REG_2, BPF_REG_2),
	BPF_MOV32_IMM(BPF_REG_0, 2),
	BPF_JMP_IMM(BPF_JNE, BPF_REG_2, 0, 1),
	BPF_MOV32_IMM(BPF_REG_0, 1),
	BPF_EXIT_INSN(),
	},
	.prog_type = BPF_PROG_TYPE_SCHED_CLS,
	.result = ACCEPT,
	.retval = 1,
},
{
	"arsh32 on imm",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_0, 1),
	BPF_ALU32_IMM(BPF_ARSH, BPF_REG_0, 5),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"arsh32 on imm 2",
	.insns = {
	BPF_LD_IMM64(BPF_REG_0, 0x1122334485667788),
	BPF_ALU32_IMM(BPF_ARSH, BPF_REG_0, 7),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = -16069393,
},
{
	"arsh32 on reg",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_0, 1),
	BPF_MOV64_IMM(BPF_REG_1, 5),
	BPF_ALU32_REG(BPF_ARSH, BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 0,
},
{
	"arsh32 on reg 2",
	.insns = {
	BPF_LD_IMM64(BPF_REG_0, 0xffff55667788),
	BPF_MOV64_IMM(BPF_REG_1, 15),
	BPF_ALU32_REG(BPF_ARSH, BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 43724,
},
{
	"arsh64 on imm",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_0, 1),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_0, 5),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
},
{
	"arsh64 on reg",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_0, 1),
	BPF_MOV64_IMM(BPF_REG_1, 5),
	BPF_ALU64_REG(BPF_ARSH, BPF_REG_0, BPF_REG_1),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
},
{
	"lsh64 by 0 imm",
	.insns = {
	BPF_LD_IMM64(BPF_REG_0, 1),
	BPF_LD_IMM64(BPF_REG_1, 1),
	BPF_ALU64_IMM(BPF_LSH, BPF_REG_1, 0),
	BPF_JMP_IMM(BPF_JEQ, BPF_REG_1, 1, 1),
	BPF_MOV64_IMM(BPF_REG_0, 2),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 1,
},
{
	"rsh64 by 0 imm",
	.insns = {
	BPF_LD_IMM64(BPF_REG_0, 1),
	BPF_LD_IMM64(BPF_REG_1, 0x100000000LL),
	BPF_ALU64_REG(BPF_MOV, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_RSH, BPF_REG_1, 0),
	BPF_JMP_REG(BPF_JEQ, BPF_REG_1, BPF_REG_2, 1),
	BPF_MOV64_IMM(BPF_REG_0, 2),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 1,
},
{
	"arsh64 by 0 imm",
	.insns = {
	BPF_LD_IMM64(BPF_REG_0, 1),
	BPF_LD_IMM64(BPF_REG_1, 0x100000000LL),
	BPF_ALU64_REG(BPF_MOV, BPF_REG_2, BPF_REG_1),
	BPF_ALU64_IMM(BPF_ARSH, BPF_REG_1, 0),
	BPF_JMP_REG(BPF_JEQ, BPF_REG_1, BPF_REG_2, 1),
	BPF_MOV64_IMM(BPF_REG_0, 2),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 1,
},
{
	"lsh64 by 0 reg",
	.insns = {
	BPF_LD_IMM64(BPF_REG_0, 1),
	BPF_LD_IMM64(BPF_REG_1, 1),
	BPF_LD_IMM64(BPF_REG_2, 0),
	BPF_ALU64_REG(BPF_LSH, BPF_REG_1, BPF_REG_2),
	BPF_JMP_IMM(BPF_JEQ, BPF_REG_1, 1, 1),
	BPF_MOV64_IMM(BPF_REG_0, 2),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 1,
},
{
	"rsh64 by 0 reg",
	.insns = {
	BPF_LD_IMM64(BPF_REG_0, 1),
	BPF_LD_IMM64(BPF_REG_1, 0x100000000LL),
	BPF_ALU64_REG(BPF_MOV, BPF_REG_2, BPF_REG_1),
	BPF_LD_IMM64(BPF_REG_3, 0),
	BPF_ALU64_REG(BPF_RSH, BPF_REG_1, BPF_REG_3),
	BPF_JMP_REG(BPF_JEQ, BPF_REG_1, BPF_REG_2, 1),
	BPF_MOV64_IMM(BPF_REG_0, 2),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 1,
},
{
	"arsh64 by 0 reg",
	.insns = {
	BPF_LD_IMM64(BPF_REG_0, 1),
	BPF_LD_IMM64(BPF_REG_1, 0x100000000LL),
	BPF_ALU64_REG(BPF_MOV, BPF_REG_2, BPF_REG_1),
	BPF_LD_IMM64(BPF_REG_3, 0),
	BPF_ALU64_REG(BPF_ARSH, BPF_REG_1, BPF_REG_3),
	BPF_JMP_REG(BPF_JEQ, BPF_REG_1, BPF_REG_2, 1),
	BPF_MOV64_IMM(BPF_REG_0, 2),
	BPF_EXIT_INSN(),
	},
	.result = ACCEPT,
	.retval = 1,
},
{
	"invalid 64-bit BPF_END",
	.insns = {
	BPF_MOV32_IMM(BPF_REG_0, 0),
	{
		.code  = BPF_ALU64 | BPF_END | BPF_TO_LE,
		.dst_reg = BPF_REG_0,
		.src_reg = 0,
		.off   = 0,
		.imm   = 32,
	},
	BPF_EXIT_INSN(),
	},
	.errstr = "unknown opcode d7",
	.result = REJECT,
},
{
	"mov64 src == dst",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_2, 0),
	BPF_MOV64_REG(BPF_REG_2, BPF_REG_2),
	// Check bounds are OK
	BPF_ALU64_REG(BPF_ADD, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_IMM(BPF_REG_0, 0),
	BPF_EXIT_INSN(),
	},
	.prog_type = BPF_PROG_TYPE_SCHED_CLS,
	.result = ACCEPT,
},
{
	"mov64 src != dst",
	.insns = {
	BPF_MOV64_IMM(BPF_REG_3, 0),
	BPF_MOV64_REG(BPF_REG_2, BPF_REG_3),
	// Check bounds are OK
	BPF_ALU64_REG(BPF_ADD, BPF_REG_1, BPF_REG_2),
	BPF_MOV64_IMM(BPF_REG_0, 0),
	BPF_EXIT_INSN(),
	},
	.prog_type = BPF_PROG_TYPE_SCHED_CLS,
	.result = ACCEPT,
},