summaryrefslogtreecommitdiffstats
path: root/tests/expected/lscpu/lscpu-ppc64-POWER7
diff options
context:
space:
mode:
Diffstat (limited to 'tests/expected/lscpu/lscpu-ppc64-POWER7')
-rw-r--r--tests/expected/lscpu/lscpu-ppc64-POWER753
1 files changed, 53 insertions, 0 deletions
diff --git a/tests/expected/lscpu/lscpu-ppc64-POWER7 b/tests/expected/lscpu/lscpu-ppc64-POWER7
new file mode 100644
index 0000000..f1668a4
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-ppc64-POWER7
@@ -0,0 +1,53 @@
+CPU(s): 16
+On-line CPU(s) list: 0-15
+Thread(s) per core: 4
+Core(s) per socket: 1
+Socket(s): 4
+NUMA node(s): 1
+Model: 2.1 (pvr 003f 0201)
+Model name: POWER7 (architected), altivec supported
+L1d cache: 128 KiB
+L1i cache: 128 KiB
+NUMA node0 CPU(s): 0-15
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i
+0,0,0,0,,0,0
+1,0,0,0,,0,0
+2,0,0,0,,0,0
+3,0,0,0,,0,0
+4,1,1,0,,1,1
+5,1,1,0,,1,1
+6,1,1,0,,1,1
+7,1,1,0,,1,1
+8,2,2,0,,2,2
+9,2,2,0,,2,2
+10,2,2,0,,2,2
+11,2,2,0,,2,2
+12,3,3,0,,3,3
+13,3,3,0,,3,3
+14,3,3,0,,3,3
+15,3,3,0,,3,3
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting from zero.
+# CPU,Core,Socket,Node,,L1d,L1i
+0,0,-,0,,0,0
+1,0,-,0,,0,0
+2,0,-,0,,0,0
+3,0,-,0,,0,0
+4,4,-,0,,1,1
+5,4,-,0,,1,1
+6,4,-,0,,1,1
+7,4,-,0,,1,1
+8,8,-,0,,2,2
+9,8,-,0,,2,2
+10,8,-,0,,2,2
+11,8,-,0,,2,2
+12,12,-,0,,3,3
+13,12,-,0,,3,3
+14,12,-,0,,3,3
+15,12,-,0,,3,3