diff options
Diffstat (limited to 'debian/patches/fix-atomics.patch')
-rw-r--r-- | debian/patches/fix-atomics.patch | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/debian/patches/fix-atomics.patch b/debian/patches/fix-atomics.patch new file mode 100644 index 0000000..2c519e7 --- /dev/null +++ b/debian/patches/fix-atomics.patch @@ -0,0 +1,89 @@ +# upstream trunk commits r1907442, r1907441 +--- apr.orig/atomic/unix/builtins.c ++++ apr/atomic/unix/builtins.c +@@ -26,7 +26,11 @@ + + APR_DECLARE(apr_status_t) apr_atomic_init(apr_pool_t *p) + { ++#if defined (NEED_ATOMICS_GENERIC64) ++ return apr__atomic_generic64_init(p); ++#else + return APR_SUCCESS; ++#endif + } + + APR_DECLARE(apr_uint32_t) apr_atomic_read32(volatile apr_uint32_t *mem) +--- apr.orig/atomic/unix/builtins64.c ++++ apr/atomic/unix/builtins64.c +@@ -26,7 +26,7 @@ + + APR_DECLARE(apr_uint64_t) apr_atomic_read64(volatile apr_uint64_t *mem) + { +-#if HAVE__ATOMIC_BUILTINS ++#if HAVE__ATOMIC_BUILTINS64 + return __atomic_load_n(mem, __ATOMIC_SEQ_CST); + #elif WEAK_MEMORY_ORDERING + /* No __sync_load() available => apr_atomic_add64(mem, 0) */ +@@ -38,7 +38,7 @@ APR_DECLARE(apr_uint64_t) apr_atomic_rea + + APR_DECLARE(void) apr_atomic_set64(volatile apr_uint64_t *mem, apr_uint64_t val) + { +-#if HAVE__ATOMIC_BUILTINS ++#if HAVE__ATOMIC_BUILTINS64 + __atomic_store_n(mem, val, __ATOMIC_SEQ_CST); + #elif WEAK_MEMORY_ORDERING + /* No __sync_store() available => apr_atomic_xchg64(mem, val) */ +@@ -51,7 +51,7 @@ APR_DECLARE(void) apr_atomic_set64(volat + + APR_DECLARE(apr_uint64_t) apr_atomic_add64(volatile apr_uint64_t *mem, apr_uint64_t val) + { +-#if HAVE__ATOMIC_BUILTINS ++#if HAVE__ATOMIC_BUILTINS64 + return __atomic_fetch_add(mem, val, __ATOMIC_SEQ_CST); + #else + return __sync_fetch_and_add(mem, val); +@@ -60,7 +60,7 @@ APR_DECLARE(apr_uint64_t) apr_atomic_add + + APR_DECLARE(void) apr_atomic_sub64(volatile apr_uint64_t *mem, apr_uint64_t val) + { +-#if HAVE__ATOMIC_BUILTINS ++#if HAVE__ATOMIC_BUILTINS64 + __atomic_fetch_sub(mem, val, __ATOMIC_SEQ_CST); + #else + __sync_fetch_and_sub(mem, val); +@@ -69,7 +69,7 @@ APR_DECLARE(void) apr_atomic_sub64(volat + + APR_DECLARE(apr_uint64_t) apr_atomic_inc64(volatile apr_uint64_t *mem) + { +-#if HAVE__ATOMIC_BUILTINS ++#if HAVE__ATOMIC_BUILTINS64 + return __atomic_fetch_add(mem, 1, __ATOMIC_SEQ_CST); + #else + return __sync_fetch_and_add(mem, 1); +@@ -78,7 +78,7 @@ APR_DECLARE(apr_uint64_t) apr_atomic_inc + + APR_DECLARE(int) apr_atomic_dec64(volatile apr_uint64_t *mem) + { +-#if HAVE__ATOMIC_BUILTINS ++#if HAVE__ATOMIC_BUILTINS64 + return __atomic_sub_fetch(mem, 1, __ATOMIC_SEQ_CST); + #else + return __sync_sub_and_fetch(mem, 1); +@@ -88,7 +88,7 @@ APR_DECLARE(int) apr_atomic_dec64(volati + APR_DECLARE(apr_uint64_t) apr_atomic_cas64(volatile apr_uint64_t *mem, apr_uint64_t val, + apr_uint64_t cmp) + { +-#if HAVE__ATOMIC_BUILTINS ++#if HAVE__ATOMIC_BUILTINS64 + __atomic_compare_exchange_n(mem, &cmp, val, 0, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST); + return cmp; + #else +@@ -98,7 +98,7 @@ APR_DECLARE(apr_uint64_t) apr_atomic_cas + + APR_DECLARE(apr_uint64_t) apr_atomic_xchg64(volatile apr_uint64_t *mem, apr_uint64_t val) + { +-#if HAVE__ATOMIC_BUILTINS ++#if HAVE__ATOMIC_BUILTINS64 + return __atomic_exchange_n(mem, val, __ATOMIC_SEQ_CST); + #else + __sync_synchronize(); |