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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-21 17:43:51 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-21 17:43:51 +0000 |
commit | be58c81aff4cd4c0ccf43dbd7998da4a6a08c03b (patch) | |
tree | 779c248fb61c83f65d1f0dc867f2053d76b4e03a /plat/mediatek/mt8183/plat_debug.c | |
parent | Initial commit. (diff) | |
download | arm-trusted-firmware-be58c81aff4cd4c0ccf43dbd7998da4a6a08c03b.tar.xz arm-trusted-firmware-be58c81aff4cd4c0ccf43dbd7998da4a6a08c03b.zip |
Adding upstream version 2.10.0+dfsg.upstream/2.10.0+dfsgupstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to '')
-rw-r--r-- | plat/mediatek/mt8183/plat_debug.c | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/plat/mediatek/mt8183/plat_debug.c b/plat/mediatek/mt8183/plat_debug.c new file mode 100644 index 0000000..2f0b67d --- /dev/null +++ b/plat/mediatek/mt8183/plat_debug.c @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include <arch_helpers.h> +#include <common/debug.h> +#include <lib/mmio.h> +#include <plat_debug.h> +#include <platform_def.h> +#include <spm.h> + +void circular_buffer_setup(void) +{ + /* Clear DBG_CONTROL.lastpc_disable to enable circular buffer */ + sync_writel(CA15M_DBG_CONTROL, + mmio_read_32(CA15M_DBG_CONTROL) & ~(BIT_CA15M_LASTPC_DIS)); +} + +void circular_buffer_unlock(void) +{ + unsigned int i; + + /* Disable big vproc external off (set CPU_EXT_BUCK_ISO to 0x0) */ + sync_writel(VPROC_EXT_CTL, mmio_read_32(VPROC_EXT_CTL) & ~(0x1 << 1)); + + /* Release vproc apb mask (set 0x0C53_2008[1] to 0x0) */ + sync_writel(CA15M_PWR_RST_CTL, mmio_read_32(CA15M_PWR_RST_CTL) & ~(0x1 << 1)); + + for (i = 1; i <= 4; ++i) + sync_writel(MP1_CPUTOP_PWR_CON + i * 4, + (mmio_read_32(MP1_CPUTOP_PWR_CON + i * 4) & ~(0x4))|(0x4)); + + /* Set DFD.en */ + sync_writel(DFD_INTERNAL_CTL, 0x1); +} + +void circular_buffer_lock(void) +{ + /* Clear DFD.en */ + sync_writel(DFD_INTERNAL_CTL, 0x0); +} + +void clear_all_on_mux(void) +{ + sync_writel(MCU_ALL_PWR_ON_CTRL, + mmio_read_32(MCU_ALL_PWR_ON_CTRL) & ~(1 << 2)); + sync_writel(MCU_ALL_PWR_ON_CTRL, + mmio_read_32(MCU_ALL_PWR_ON_CTRL) & ~(1 << 1)); +} + +void l2c_parity_check_setup(void) +{ + /* Enable DBG_CONTROL.l2parity_en */ + sync_writel(CA15M_DBG_CONTROL, + mmio_read_32(CA15M_DBG_CONTROL) | BIT_CA15M_L2PARITY_EN); +} |