diff options
Diffstat (limited to 'include/common')
| -rw-r--r-- | include/common/asm_macros_common.S | 113 | ||||
| -rw-r--r-- | include/common/bl_common.h | 199 | ||||
| -rw-r--r-- | include/common/bl_common.ld.h | 241 | ||||
| -rw-r--r-- | include/common/debug.h | 135 | ||||
| -rw-r--r-- | include/common/desc_image_load.h | 48 | ||||
| -rw-r--r-- | include/common/ep_info.h | 68 | ||||
| -rw-r--r-- | include/common/fdt_fixup.h | 38 | ||||
| -rw-r--r-- | include/common/fdt_wrappers.h | 72 | ||||
| -rw-r--r-- | include/common/feat_detect.h | 18 | ||||
| -rw-r--r-- | include/common/image_decompress.h | 24 | ||||
| -rw-r--r-- | include/common/interrupt_props.h | 29 | ||||
| -rw-r--r-- | include/common/nv_cntr_ids.h | 9 | ||||
| -rw-r--r-- | include/common/param_header.h | 35 | ||||
| -rw-r--r-- | include/common/romlib.h | 16 | ||||
| -rw-r--r-- | include/common/runtime_svc.h | 138 | ||||
| -rw-r--r-- | include/common/tbbr/cot_def.h | 76 | ||||
| -rw-r--r-- | include/common/tbbr/tbbr_img_def.h | 37 | ||||
| -rw-r--r-- | include/common/tf_crc32.h | 16 | ||||
| -rw-r--r-- | include/common/uuid.h | 21 |
19 files changed, 1333 insertions, 0 deletions
diff --git a/include/common/asm_macros_common.S b/include/common/asm_macros_common.S new file mode 100644 index 0000000..fd0ea81 --- /dev/null +++ b/include/common/asm_macros_common.S @@ -0,0 +1,113 @@ +/* + * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef ASM_MACROS_COMMON_S +#define ASM_MACROS_COMMON_S + + /* + * This macro is used to create a function label and place the + * code into a separate text section based on the function name + * to enable elimination of unused code during linking. It also adds + * basic debug information to enable call stack printing most of the + * time. The optional _align parameter can be used to force a + * non-standard alignment (indicated in powers of 2). The default is + * _align=2 because both Aarch32 and Aarch64 instructions must be + * word aligned. Do *not* try to use a raw .align directive. Since func + * switches to a new section, this would not have the desired effect. + */ + .macro func _name, _align=2 + /* + * Add Call Frame Information entry in the .debug_frame section for + * debugger consumption. This enables callstack printing in debuggers. + * This does not use any space in the final loaded binary, only in the + * ELF file. + * Note that a function manipulating the CFA pointer location (i.e. the + * x29 frame pointer on AArch64) should declare it using the + * appropriate .cfi* directives, or be prepared to have a degraded + * debugging experience. + */ + .cfi_sections .debug_frame + .section .text.asm.\_name, "ax" + .type \_name, %function + /* + * .cfi_startproc and .cfi_endproc are needed to output entries in + * .debug_frame + */ + .cfi_startproc + .align \_align + \_name: +#if ENABLE_BTI + /* When Branch Target Identification is enabled, insert "bti jc" + * instruction to enable indirect calls and branches + */ + bti jc +#endif + .endm + + /* + * This macro is used to mark the end of a function. + */ + .macro endfunc _name + .cfi_endproc + .size \_name, . - \_name + .endm + + /* + * Theses macros are used to create function labels for deprecated + * APIs. If ERROR_DEPRECATED is non zero, the callers of these APIs + * will fail to link and cause build failure. + */ +#if ERROR_DEPRECATED + .macro func_deprecated _name + func deprecated\_name + .endm + + .macro endfunc_deprecated _name + endfunc deprecated\_name + .endm +#else + .macro func_deprecated _name + func \_name + .endm + + .macro endfunc_deprecated _name + endfunc \_name + .endm +#endif + + /* + * Helper assembler macro to count trailing zeros. The output is + * populated in the `TZ_COUNT` symbol. + */ + .macro count_tz _value, _tz_count + .if \_value + count_tz "(\_value >> 1)", "(\_tz_count + 1)" + .else + .equ TZ_COUNT, (\_tz_count - 1) + .endif + .endm + + /* + * This macro declares an array of 1 or more stacks, properly + * aligned and in the requested section + */ +#define DEFAULT_STACK_ALIGN (1 << 6) /* In case the caller doesnt provide alignment */ + + .macro declare_stack _name, _section, _size, _count, _align=DEFAULT_STACK_ALIGN + count_tz \_align, 0 + .if (\_align - (1 << TZ_COUNT)) + .error "Incorrect stack alignment specified (Must be a power of 2)." + .endif + .if ((\_size & ((1 << TZ_COUNT) - 1)) <> 0) + .error "Stack size not correctly aligned" + .endif + .section \_section, "aw", %nobits + .align TZ_COUNT + \_name: + .space ((\_count) * (\_size)), 0 + .endm + + +#endif /* ASM_MACROS_COMMON_S */ diff --git a/include/common/bl_common.h b/include/common/bl_common.h new file mode 100644 index 0000000..4c8a17c --- /dev/null +++ b/include/common/bl_common.h @@ -0,0 +1,199 @@ +/* + * Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef BL_COMMON_H +#define BL_COMMON_H + +#include <common/ep_info.h> +#include <common/param_header.h> +#include <lib/utils_def.h> + +#ifndef __ASSEMBLER__ +#include <stddef.h> +#include <stdint.h> +#include <lib/cassert.h> +#endif /* __ASSEMBLER__ */ + +#include <export/common/bl_common_exp.h> + +#define UP U(1) +#define DOWN U(0) + +/******************************************************************************* + * Constants to identify the location of a memory region in a given memory + * layout. +******************************************************************************/ +#define TOP U(0x1) +#define BOTTOM U(0x0) + +/******************************************************************************* + * Constants to indicate type of exception to the common exception handler. + ******************************************************************************/ +#define SYNC_EXCEPTION_SP_EL0 U(0x0) +#define IRQ_SP_EL0 U(0x1) +#define FIQ_SP_EL0 U(0x2) +#define SERROR_SP_EL0 U(0x3) +#define SYNC_EXCEPTION_SP_ELX U(0x4) +#define IRQ_SP_ELX U(0x5) +#define FIQ_SP_ELX U(0x6) +#define SERROR_SP_ELX U(0x7) +#define SYNC_EXCEPTION_AARCH64 U(0x8) +#define IRQ_AARCH64 U(0x9) +#define FIQ_AARCH64 U(0xa) +#define SERROR_AARCH64 U(0xb) +#define SYNC_EXCEPTION_AARCH32 U(0xc) +#define IRQ_AARCH32 U(0xd) +#define FIQ_AARCH32 U(0xe) +#define SERROR_AARCH32 U(0xf) + +/* + * Mapping to connect linker symbols from .ld.S with their counterparts + * from .scat for the BL31 image + */ +#if defined(USE_ARM_LINK) +#define __BL31_END__ Load$$LR$$LR_END$$Base +#define __BSS_START__ Load$$LR$$LR_BSS$$Base +#define __BSS_END__ Load$$LR$$LR_BSS$$Limit +#define __BSS_SIZE__ Load$$LR$$LR_BSS$$Length +#define __COHERENT_RAM_START__ Load$$LR$$LR_COHERENT_RAM$$Base +#define __COHERENT_RAM_END_UNALIGNED__ Load$$__COHERENT_RAM_EPILOGUE_UNALIGNED__$$Base +#define __COHERENT_RAM_END__ Load$$LR$$LR_COHERENT_RAM$$Limit +#define __COHERENT_RAM_UNALIGNED_SIZE__ Load$$__COHERENT_RAM__$$Length +#define __CPU_OPS_START__ Load$$__CPU_OPS__$$Base +#define __CPU_OPS_END__ Load$$__CPU_OPS__$$Limit +#define __DATA_START__ Load$$__DATA__$$Base +#define __DATA_END__ Load$$__DATA__$$Limit +#define __GOT_START__ Load$$__GOT__$$Base +#define __GOT_END__ Load$$__GOT__$$Limit +#define __PERCPU_BAKERY_LOCK_START__ Load$$__BAKERY_LOCKS__$$Base +#define __PERCPU_BAKERY_LOCK_END__ Load$$__BAKERY_LOCKS_EPILOGUE__$$Base +#define __PMF_SVC_DESCS_START__ Load$$__PMF_SVC_DESCS__$$Base +#define __PMF_SVC_DESCS_END__ Load$$__PMF_SVC_DESCS__$$Limit +#define __PMF_TIMESTAMP_START__ Load$$__PMF_TIMESTAMP__$$Base +#define __PMF_TIMESTAMP_END__ Load$$__PER_CPU_TIMESTAMPS__$$Limit +#define __PMF_PERCPU_TIMESTAMP_END__ Load$$__PMF_TIMESTAMP_EPILOGUE__$$Base +#define __RELA_END__ Load$$__RELA__$$Limit +#define __RELA_START__ Load$$__RELA__$$Base +#define __RODATA_START__ Load$$__RODATA__$$Base +#define __RODATA_END__ Load$$__RODATA_EPILOGUE__$$Base +#define __RT_SVC_DESCS_START__ Load$$__RT_SVC_DESCS__$$Base +#define __RT_SVC_DESCS_END__ Load$$__RT_SVC_DESCS__$$Limit +#if SPMC_AT_EL3 +#define __EL3_LP_DESCS_START__ Load$$__EL3_LP_DESCS__$$Base +#define __EL3_LP_DESCS_END__ Load$$__EL3_LP_DESCS__$$Limit +#endif +#if ENABLE_SPMD_LP +#define __SPMD_LP_DESCS_START__ Load$$__SPMD_LP_DESCS__$$Base +#define __SPMD_LP_DESCS_END__ Load$$__SPMD_LP_DESCS__$$Limit +#endif +#define __RW_START__ Load$$LR$$LR_RW_DATA$$Base +#define __RW_END__ Load$$LR$$LR_END$$Base +#define __SPM_SHIM_EXCEPTIONS_START__ Load$$__SPM_SHIM_EXCEPTIONS__$$Base +#define __SPM_SHIM_EXCEPTIONS_END__ Load$$__SPM_SHIM_EXCEPTIONS_EPILOGUE__$$Base +#define __STACKS_START__ Load$$__STACKS__$$Base +#define __STACKS_END__ Load$$__STACKS__$$Limit +#define __TEXT_START__ Load$$__TEXT__$$Base +#define __TEXT_END__ Load$$__TEXT_EPILOGUE__$$Base +#endif /* USE_ARM_LINK */ + +#ifndef __ASSEMBLER__ + +/* + * Declarations of linker defined symbols to help determine memory layout of + * BL images + */ +#if SEPARATE_CODE_AND_RODATA +IMPORT_SYM(uintptr_t, __TEXT_START__, BL_CODE_BASE); +IMPORT_SYM(uintptr_t, __TEXT_END__, BL_CODE_END); +IMPORT_SYM(uintptr_t, __RODATA_START__, BL_RO_DATA_BASE); +IMPORT_SYM(uintptr_t, __RODATA_END__, BL_RO_DATA_END); +#else +IMPORT_SYM(uintptr_t, __RO_START__, BL_CODE_BASE); +IMPORT_SYM(uintptr_t, __RO_END__, BL_CODE_END); +#endif +#if SEPARATE_NOBITS_REGION +IMPORT_SYM(uintptr_t, __NOBITS_START__, BL_NOBITS_BASE); +IMPORT_SYM(uintptr_t, __NOBITS_END__, BL_NOBITS_END); +#endif +IMPORT_SYM(uintptr_t, __RW_END__, BL_END); + +#if defined(IMAGE_BL1) +IMPORT_SYM(uintptr_t, __BL1_ROM_END__, BL1_ROM_END); + +IMPORT_SYM(uintptr_t, __BL1_RAM_START__, BL1_RAM_BASE); +IMPORT_SYM(uintptr_t, __BL1_RAM_END__, BL1_RAM_LIMIT); +#elif defined(IMAGE_BL2) +IMPORT_SYM(uintptr_t, __BL2_END__, BL2_END); +#elif defined(IMAGE_BL2U) +IMPORT_SYM(uintptr_t, __BL2U_END__, BL2U_END); +#elif defined(IMAGE_BL31) +IMPORT_SYM(uintptr_t, __BL31_START__, BL31_START); +IMPORT_SYM(uintptr_t, __BL31_END__, BL31_END); +#elif defined(IMAGE_BL32) +IMPORT_SYM(uintptr_t, __BL32_END__, BL32_END); +#elif defined(IMAGE_RMM) +IMPORT_SYM(uintptr_t, __RMM_END__, RMM_END); +#endif /* IMAGE_BLX */ + +/* The following symbols are only exported from the BL2 at EL3 linker script. */ +#if BL2_IN_XIP_MEM && defined(IMAGE_BL2) +IMPORT_SYM(uintptr_t, __BL2_ROM_END__, BL2_ROM_END); + +IMPORT_SYM(uintptr_t, __BL2_RAM_START__, BL2_RAM_BASE); +IMPORT_SYM(uintptr_t, __BL2_RAM_END__, BL2_RAM_END); +#endif /* BL2_IN_XIP_MEM */ + +/* + * The next 2 constants identify the extents of the coherent memory region. + * These addresses are used by the MMU setup code and therefore they must be + * page-aligned. It is the responsibility of the linker script to ensure that + * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to + * page-aligned addresses. + */ +#if USE_COHERENT_MEM +IMPORT_SYM(uintptr_t, __COHERENT_RAM_START__, BL_COHERENT_RAM_BASE); +IMPORT_SYM(uintptr_t, __COHERENT_RAM_END__, BL_COHERENT_RAM_END); +#endif + +/******************************************************************************* + * Structure used for telling the next BL how much of a particular type of + * memory is available for its use and how much is already used. + ******************************************************************************/ +typedef struct meminfo { + uintptr_t total_base; + size_t total_size; +} meminfo_t; + +/******************************************************************************* + * Function & variable prototypes + ******************************************************************************/ +int load_auth_image(unsigned int image_id, image_info_t *image_data); + +#if TRUSTED_BOARD_BOOT && defined(DYN_DISABLE_AUTH) +/* + * API to dynamically disable authentication. Only meant for development + * systems. + */ +void dyn_disable_auth(void); +#endif + +extern const char build_message[]; +extern const char version_string[]; +const char *get_version(void); + +void print_entry_point_info(const entry_point_info_t *ep_info); +uintptr_t page_align(uintptr_t value, unsigned dir); + +struct mmap_region; + +void setup_page_tables(const struct mmap_region *bl_regions, + const struct mmap_region *plat_regions); + +void bl_handle_pauth(void); + +#endif /*__ASSEMBLER__*/ + +#endif /* BL_COMMON_H */ diff --git a/include/common/bl_common.ld.h b/include/common/bl_common.ld.h new file mode 100644 index 0000000..b6dd0f0 --- /dev/null +++ b/include/common/bl_common.ld.h @@ -0,0 +1,241 @@ +/* + * Copyright (c) 2020-2022, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef BL_COMMON_LD_H +#define BL_COMMON_LD_H + +#include <platform_def.h> + +#ifdef __aarch64__ +#define STRUCT_ALIGN 8 +#define BSS_ALIGN 16 +#else +#define STRUCT_ALIGN 4 +#define BSS_ALIGN 8 +#endif + +#ifndef DATA_ALIGN +#define DATA_ALIGN 1 +#endif + +#define CPU_OPS \ + . = ALIGN(STRUCT_ALIGN); \ + __CPU_OPS_START__ = .; \ + KEEP(*(.cpu_ops)) \ + __CPU_OPS_END__ = .; + +#define PARSER_LIB_DESCS \ + . = ALIGN(STRUCT_ALIGN); \ + __PARSER_LIB_DESCS_START__ = .; \ + KEEP(*(.img_parser_lib_descs)) \ + __PARSER_LIB_DESCS_END__ = .; + +#define RT_SVC_DESCS \ + . = ALIGN(STRUCT_ALIGN); \ + __RT_SVC_DESCS_START__ = .; \ + KEEP(*(.rt_svc_descs)) \ + __RT_SVC_DESCS_END__ = .; + +#if SPMC_AT_EL3 +#define EL3_LP_DESCS \ + . = ALIGN(STRUCT_ALIGN); \ + __EL3_LP_DESCS_START__ = .; \ + KEEP(*(.el3_lp_descs)) \ + __EL3_LP_DESCS_END__ = .; +#else +#define EL3_LP_DESCS +#endif + +#if ENABLE_SPMD_LP +#define SPMD_LP_DESCS \ + . = ALIGN(STRUCT_ALIGN); \ + __SPMD_LP_DESCS_START__ = .; \ + KEEP(*(.spmd_lp_descs)) \ + __SPMD_LP_DESCS_END__ = .; +#else +#define SPMD_LP_DESCS +#endif +#define PMF_SVC_DESCS \ + . = ALIGN(STRUCT_ALIGN); \ + __PMF_SVC_DESCS_START__ = .; \ + KEEP(*(.pmf_svc_descs)) \ + __PMF_SVC_DESCS_END__ = .; + +#define FCONF_POPULATOR \ + . = ALIGN(STRUCT_ALIGN); \ + __FCONF_POPULATOR_START__ = .; \ + KEEP(*(.fconf_populator)) \ + __FCONF_POPULATOR_END__ = .; + +/* + * Keep the .got section in the RO section as it is patched prior to enabling + * the MMU and having the .got in RO is better for security. GOT is a table of + * addresses so ensure pointer size alignment. + */ +#define GOT \ + . = ALIGN(STRUCT_ALIGN); \ + __GOT_START__ = .; \ + *(.got) \ + __GOT_END__ = .; + +/* + * The base xlat table + * + * It is put into the rodata section if PLAT_RO_XLAT_TABLES=1, + * or into the bss section otherwise. + */ +#define BASE_XLAT_TABLE \ + . = ALIGN(16); \ + __BASE_XLAT_TABLE_START__ = .; \ + *(.base_xlat_table) \ + __BASE_XLAT_TABLE_END__ = .; + +#if PLAT_RO_XLAT_TABLES +#define BASE_XLAT_TABLE_RO BASE_XLAT_TABLE +#define BASE_XLAT_TABLE_BSS +#else +#define BASE_XLAT_TABLE_RO +#define BASE_XLAT_TABLE_BSS BASE_XLAT_TABLE +#endif + +#define RODATA_COMMON \ + RT_SVC_DESCS \ + FCONF_POPULATOR \ + PMF_SVC_DESCS \ + PARSER_LIB_DESCS \ + CPU_OPS \ + GOT \ + BASE_XLAT_TABLE_RO \ + EL3_LP_DESCS \ + SPMD_LP_DESCS + +/* + * .data must be placed at a lower address than the stacks if the stack + * protector is enabled. Alternatively, the .data.stack_protector_canary + * section can be placed independently of the main .data section. + */ +#define DATA_SECTION \ + .data . : ALIGN(DATA_ALIGN) { \ + __DATA_START__ = .; \ + *(SORT_BY_ALIGNMENT(.data*)) \ + __DATA_END__ = .; \ + } + +/* + * .rela.dyn needs to come after .data for the read-elf utility to parse + * this section correctly. + */ +#if __aarch64__ +#define RELA_DYN_NAME .rela.dyn +#define RELOC_SECTIONS_PATTERN *(.rela*) +#else +#define RELA_DYN_NAME .rel.dyn +#define RELOC_SECTIONS_PATTERN *(.rel*) +#endif + +#define RELA_SECTION \ + RELA_DYN_NAME : ALIGN(STRUCT_ALIGN) { \ + __RELA_START__ = .; \ + RELOC_SECTIONS_PATTERN \ + __RELA_END__ = .; \ + } + +#if !(defined(IMAGE_BL31) && RECLAIM_INIT_CODE) +#define STACK_SECTION \ + .stacks (NOLOAD) : { \ + __STACKS_START__ = .; \ + *(.tzfw_normal_stacks) \ + __STACKS_END__ = .; \ + } +#endif + +/* + * If BL doesn't use any bakery lock then __PERCPU_BAKERY_LOCK_SIZE__ + * will be zero. For this reason, the only two valid values for + * __PERCPU_BAKERY_LOCK_SIZE__ are 0 or the platform defined value + * PLAT_PERCPU_BAKERY_LOCK_SIZE. + */ +#ifdef PLAT_PERCPU_BAKERY_LOCK_SIZE +#define BAKERY_LOCK_SIZE_CHECK \ + ASSERT((__PERCPU_BAKERY_LOCK_SIZE__ == 0) || \ + (__PERCPU_BAKERY_LOCK_SIZE__ == PLAT_PERCPU_BAKERY_LOCK_SIZE), \ + "PLAT_PERCPU_BAKERY_LOCK_SIZE does not match bakery lock requirements"); +#else +#define BAKERY_LOCK_SIZE_CHECK +#endif + +/* + * Bakery locks are stored in normal .bss memory + * + * Each lock's data is spread across multiple cache lines, one per CPU, + * but multiple locks can share the same cache line. + * The compiler will allocate enough memory for one CPU's bakery locks, + * the remaining cache lines are allocated by the linker script + */ +#if !USE_COHERENT_MEM +#define BAKERY_LOCK_NORMAL \ + . = ALIGN(CACHE_WRITEBACK_GRANULE); \ + __BAKERY_LOCK_START__ = .; \ + __PERCPU_BAKERY_LOCK_START__ = .; \ + *(.bakery_lock) \ + . = ALIGN(CACHE_WRITEBACK_GRANULE); \ + __PERCPU_BAKERY_LOCK_END__ = .; \ + __PERCPU_BAKERY_LOCK_SIZE__ = ABSOLUTE(__PERCPU_BAKERY_LOCK_END__ - __PERCPU_BAKERY_LOCK_START__); \ + . = . + (__PERCPU_BAKERY_LOCK_SIZE__ * (PLATFORM_CORE_COUNT - 1)); \ + __BAKERY_LOCK_END__ = .; \ + BAKERY_LOCK_SIZE_CHECK +#else +#define BAKERY_LOCK_NORMAL +#endif + +/* + * Time-stamps are stored in normal .bss memory + * + * The compiler will allocate enough memory for one CPU's time-stamps, + * the remaining memory for other CPUs is allocated by the + * linker script + */ +#define PMF_TIMESTAMP \ + . = ALIGN(CACHE_WRITEBACK_GRANULE); \ + __PMF_TIMESTAMP_START__ = .; \ + KEEP(*(.pmf_timestamp_array)) \ + . = ALIGN(CACHE_WRITEBACK_GRANULE); \ + __PMF_PERCPU_TIMESTAMP_END__ = .; \ + __PERCPU_TIMESTAMP_SIZE__ = ABSOLUTE(. - __PMF_TIMESTAMP_START__); \ + . = . + (__PERCPU_TIMESTAMP_SIZE__ * (PLATFORM_CORE_COUNT - 1)); \ + __PMF_TIMESTAMP_END__ = .; + + +/* + * The .bss section gets initialised to 0 at runtime. + * Its base address has bigger alignment for better performance of the + * zero-initialization code. + */ +#define BSS_SECTION \ + .bss (NOLOAD) : ALIGN(BSS_ALIGN) { \ + __BSS_START__ = .; \ + *(SORT_BY_ALIGNMENT(.bss*)) \ + *(COMMON) \ + BAKERY_LOCK_NORMAL \ + PMF_TIMESTAMP \ + BASE_XLAT_TABLE_BSS \ + __BSS_END__ = .; \ + } + +/* + * The .xlat_table section is for full, aligned page tables (4K). + * Removing them from .bss avoids forcing 4K alignment on + * the .bss section. The tables are initialized to zero by the translation + * tables library. + */ +#define XLAT_TABLE_SECTION \ + .xlat_table (NOLOAD) : { \ + __XLAT_TABLE_START__ = .; \ + *(.xlat_table) \ + __XLAT_TABLE_END__ = .; \ + } + +#endif /* BL_COMMON_LD_H */ diff --git a/include/common/debug.h b/include/common/debug.h new file mode 100644 index 0000000..5ea541d --- /dev/null +++ b/include/common/debug.h @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef DEBUG_H +#define DEBUG_H + +#include <lib/utils_def.h> + +/* + * The log output macros print output to the console. These macros produce + * compiled log output only if the LOG_LEVEL defined in the makefile (or the + * make command line) is greater or equal than the level required for that + * type of log output. + * + * The format expected is the same as for printf(). For example: + * INFO("Info %s.\n", "message") -> INFO: Info message. + * WARN("Warning %s.\n", "message") -> WARNING: Warning message. + */ + +#define LOG_LEVEL_NONE U(0) +#define LOG_LEVEL_ERROR U(10) +#define LOG_LEVEL_NOTICE U(20) +#define LOG_LEVEL_WARNING U(30) +#define LOG_LEVEL_INFO U(40) +#define LOG_LEVEL_VERBOSE U(50) + +#ifndef __ASSEMBLER__ + +#include <cdefs.h> +#include <stdarg.h> +#include <stdbool.h> +#include <stdio.h> + +#include <drivers/console.h> + +/* + * Define Log Markers corresponding to each log level which will + * be embedded in the format string and is expected by tf_log() to determine + * the log level. + */ +#define LOG_MARKER_ERROR "\xa" /* 10 */ +#define LOG_MARKER_NOTICE "\x14" /* 20 */ +#define LOG_MARKER_WARNING "\x1e" /* 30 */ +#define LOG_MARKER_INFO "\x28" /* 40 */ +#define LOG_MARKER_VERBOSE "\x32" /* 50 */ + +/* + * If the log output is too low then this macro is used in place of tf_log() + * below. The intent is to get the compiler to evaluate the function call for + * type checking and format specifier correctness but let it optimize it out. + */ +#define no_tf_log(fmt, ...) \ + do { \ + if (false) { \ + tf_log(fmt, ##__VA_ARGS__); \ + } \ + } while (false) + +#if LOG_LEVEL >= LOG_LEVEL_ERROR +# define ERROR(...) tf_log(LOG_MARKER_ERROR __VA_ARGS__) +# define ERROR_NL() tf_log_newline(LOG_MARKER_ERROR) +#else +# define ERROR(...) no_tf_log(LOG_MARKER_ERROR __VA_ARGS__) +# define ERROR_NL() +#endif + +#if LOG_LEVEL >= LOG_LEVEL_NOTICE +# define NOTICE(...) tf_log(LOG_MARKER_NOTICE __VA_ARGS__) +#else +# define NOTICE(...) no_tf_log(LOG_MARKER_NOTICE __VA_ARGS__) +#endif + +#if LOG_LEVEL >= LOG_LEVEL_WARNING +# define WARN(...) tf_log(LOG_MARKER_WARNING __VA_ARGS__) +#else +# define WARN(...) no_tf_log(LOG_MARKER_WARNING __VA_ARGS__) +#endif + +#if LOG_LEVEL >= LOG_LEVEL_INFO +# define INFO(...) tf_log(LOG_MARKER_INFO __VA_ARGS__) +#else +# define INFO(...) no_tf_log(LOG_MARKER_INFO __VA_ARGS__) +#endif + +#if LOG_LEVEL >= LOG_LEVEL_VERBOSE +# define VERBOSE(...) tf_log(LOG_MARKER_VERBOSE __VA_ARGS__) +#else +# define VERBOSE(...) no_tf_log(LOG_MARKER_VERBOSE __VA_ARGS__) +#endif + +const char *get_el_str(unsigned int el); + +#if ENABLE_BACKTRACE +void backtrace(const char *cookie); +#else +#define backtrace(x) +#endif + +void __dead2 el3_panic(void); +void __dead2 elx_panic(void); + +#define panic() \ + do { \ + backtrace(__func__); \ + console_flush(); \ + el3_panic(); \ + } while (false) + +#if CRASH_REPORTING +/* -------------------------------------------------------------------- + * do_lower_el_panic assumes it's called due to a panic from a lower EL + * This call will not return. + * -------------------------------------------------------------------- + */ +#define lower_el_panic() \ + do { \ + console_flush(); \ + elx_panic(); \ + } while (false) +#else +#define lower_el_panic() +#endif + +/* Function called when stack protection check code detects a corrupted stack */ +void __dead2 __stack_chk_fail(void); + +void tf_log(const char *fmt, ...) __printflike(1, 2); +void tf_log_newline(const char log_fmt[2]); +void tf_log_set_max_level(unsigned int log_level); + +#endif /* __ASSEMBLER__ */ +#endif /* DEBUG_H */ diff --git a/include/common/desc_image_load.h b/include/common/desc_image_load.h new file mode 100644 index 0000000..b044f3e --- /dev/null +++ b/include/common/desc_image_load.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef DESC_IMAGE_LOAD_H +#define DESC_IMAGE_LOAD_H + +#include <common/bl_common.h> + +/* Following structure is used to store BL ep/image info. */ +typedef struct bl_mem_params_node { + unsigned int image_id; + image_info_t image_info; + entry_point_info_t ep_info; + unsigned int next_handoff_image_id; + bl_load_info_node_t load_node_mem; + bl_params_node_t params_node_mem; +} bl_mem_params_node_t; + +extern bl_mem_params_node_t *bl_mem_params_desc_ptr; +extern unsigned int bl_mem_params_desc_num; + +/* + * Macro to register list of BL image descriptors, + * defined as an array of bl_mem_params_node_t. + */ +#define REGISTER_BL_IMAGE_DESCS(_img_desc) \ + bl_mem_params_node_t *bl_mem_params_desc_ptr = &_img_desc[0]; \ + unsigned int bl_mem_params_desc_num = ARRAY_SIZE(_img_desc); + +/* BL image loading utility functions */ +void flush_bl_params_desc(void); +void flush_bl_params_desc_args(bl_mem_params_node_t *mem_params_desc_ptr, + unsigned int mem_params_desc_num, + bl_params_t *next_bl_params_ptr); +int get_bl_params_node_index(unsigned int image_id); +bl_mem_params_node_t *get_bl_mem_params_node(unsigned int image_id); +bl_load_info_t *get_bl_load_info_from_mem_params_desc(void); +bl_params_t *get_next_bl_params_from_mem_params_desc(void); +void populate_next_bl_params_config(bl_params_t *bl2_to_next_bl_params); + +/* Helper to extract BL32/BL33 entry point info from arg0 passed to BL31. */ +void bl31_params_parse_helper(u_register_t param, + entry_point_info_t *bl32_ep_info_out, + entry_point_info_t *bl33_ep_info_out); + +#endif /* DESC_IMAGE_LOAD_H */ diff --git a/include/common/ep_info.h b/include/common/ep_info.h new file mode 100644 index 0000000..771572c --- /dev/null +++ b/include/common/ep_info.h @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2017-2021, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef EP_INFO_H +#define EP_INFO_H + +#include <common/param_header.h> + +#ifndef __ASSEMBLER__ +#include <stdint.h> +#include <lib/cassert.h> +#endif /* __ASSEMBLER__ */ + +#include <export/common/ep_info_exp.h> + +#define SECURE EP_SECURE +#define NON_SECURE EP_NON_SECURE +#define REALM EP_REALM +#if ENABLE_RME +#define sec_state_is_valid(s) (((s) == SECURE) || \ + ((s) == NON_SECURE) || \ + ((s) == REALM)) +#else +#define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE)) +#endif + +#define PARAM_EP_SECURITY_MASK EP_SECURITY_MASK + +#define NON_EXECUTABLE EP_NON_EXECUTABLE +#define EXECUTABLE EP_EXECUTABLE + +/* Get/set security state of an image */ +#define GET_SECURITY_STATE(x) ((x) & EP_SECURITY_MASK) +#define SET_SECURITY_STATE(x, security) \ + ((x) = ((x) & ~EP_SECURITY_MASK) | (security)) + +#ifndef __ASSEMBLER__ + +/* + * Compile time assertions related to the 'entry_point_info' structure to + * ensure that the assembler and the compiler view of the offsets of + * the structure members is the same. + */ +CASSERT(ENTRY_POINT_INFO_PC_OFFSET == + __builtin_offsetof(entry_point_info_t, pc), \ + assert_BL31_pc_offset_mismatch); + +#ifndef __aarch64__ +CASSERT(ENTRY_POINT_INFO_LR_SVC_OFFSET == + __builtin_offsetof(entry_point_info_t, lr_svc), + assert_entrypoint_lr_offset_error); +#endif + +CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \ + __builtin_offsetof(entry_point_info_t, args), \ + assert_BL31_args_offset_mismatch); + +CASSERT(sizeof(uintptr_t) == + __builtin_offsetof(entry_point_info_t, spsr) - \ + __builtin_offsetof(entry_point_info_t, pc), \ + assert_entrypoint_and_spsr_should_be_adjacent); + +#endif /*__ASSEMBLER__*/ + +#endif /* EP_INFO_H */ diff --git a/include/common/fdt_fixup.h b/include/common/fdt_fixup.h new file mode 100644 index 0000000..9531bdb --- /dev/null +++ b/include/common/fdt_fixup.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef FDT_FIXUP_H +#define FDT_FIXUP_H + +#include <stdbool.h> +#include <stddef.h> +#include <stdint.h> + +#define INVALID_BASE_ADDR ((uintptr_t)~0UL) + +struct psci_cpu_idle_state { + const char *name; + uint32_t power_state; + bool local_timer_stop; + uint32_t entry_latency_us; + uint32_t exit_latency_us; + uint32_t min_residency_us; + uint32_t wakeup_latency_us; +}; + +int dt_add_psci_node(void *fdt); +int dt_add_psci_cpu_enable_methods(void *fdt); +int fdt_add_reserved_memory(void *dtb, const char *node_name, + uintptr_t base, size_t size); +int fdt_add_cpus_node(void *dtb, unsigned int afflv0, + unsigned int afflv1, unsigned int afflv2); +int fdt_add_cpu_idle_states(void *dtb, const struct psci_cpu_idle_state *state); +int fdt_adjust_gic_redist(void *dtb, unsigned int nr_cores, uintptr_t gicr_base, + unsigned int gicr_frame_size); +int fdt_set_mac_address(void *dtb, unsigned int ethernet_idx, + const uint8_t *mac_addr); + +#endif /* FDT_FIXUP_H */ diff --git a/include/common/fdt_wrappers.h b/include/common/fdt_wrappers.h new file mode 100644 index 0000000..abbf976 --- /dev/null +++ b/include/common/fdt_wrappers.h @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2018-2023, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/* Helper functions to offer easier navigation of Device Tree Blob */ + +#ifndef FDT_WRAPPERS_H +#define FDT_WRAPPERS_H + +#include <libfdt_env.h> +#include <libfdt.h> + +/* Number of cells, given total length in bytes. Each cell is 4 bytes long */ +#define NCELLS(len) ((len) / 4U) + +int fdt_read_uint32(const void *dtb, int node, const char *prop_name, + uint32_t *value); +uint32_t fdt_read_uint32_default(const void *dtb, int node, + const char *prop_name, uint32_t dflt_value); +int fdt_read_uint64(const void *dtb, int node, const char *prop_name, + uint64_t *value); +int fdt_read_uint32_array(const void *dtb, int node, const char *prop_name, + unsigned int cells, uint32_t *value); +int fdtw_read_string(const void *dtb, int node, const char *prop, + char *str, size_t size); +int fdtw_read_uuid(const void *dtb, int node, const char *prop, + unsigned int length, uint8_t *uuid); +int fdtw_write_inplace_cells(void *dtb, int node, const char *prop, + unsigned int cells, void *value); +int fdtw_read_bytes(const void *dtb, int node, const char *prop, + unsigned int length, void *value); +int fdtw_write_inplace_bytes(void *dtb, int node, const char *prop, + unsigned int length, const void *data); +int fdt_get_reg_props_by_index(const void *dtb, int node, int index, + uintptr_t *base, size_t *size); +int fdt_get_reg_props_by_name(const void *dtb, int node, const char *name, + uintptr_t *base, size_t *size); +int fdt_get_stdout_node_offset(const void *dtb); + +uint64_t fdtw_translate_address(const void *dtb, int bus_node, + uint64_t base_address); + +int fdtw_for_each_cpu(const void *fdt, + int (*callback)(const void *dtb, int node, uintptr_t mpidr)); + +int fdtw_find_or_add_subnode(void *fdt, int parentoffset, const char *name); + +static inline uint32_t fdt_blob_size(const void *dtb) +{ + const uint32_t *dtb_header = (const uint32_t *)dtb; + + return fdt32_to_cpu(dtb_header[1]); +} + +static inline bool fdt_node_is_enabled(const void *fdt, int node) +{ + int len; + const void *prop = fdt_getprop(fdt, node, "status", &len); + + /* A non-existing status property means the device is enabled. */ + return (prop == NULL) || (len == 5 && strcmp((const char *)prop, + "okay") == 0); +} + +#define fdt_for_each_compatible_node(dtb, node, compatible_str) \ +for (node = fdt_node_offset_by_compatible(dtb, -1, compatible_str); \ + node >= 0; \ + node = fdt_node_offset_by_compatible(dtb, node, compatible_str)) + +#endif /* FDT_WRAPPERS_H */ diff --git a/include/common/feat_detect.h b/include/common/feat_detect.h new file mode 100644 index 0000000..788dfb3 --- /dev/null +++ b/include/common/feat_detect.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2022, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef FEAT_DETECT_H +#define FEAT_DETECT_H + +/* Function Prototypes */ +void detect_arch_features(void); + +/* Macro Definitions */ +#define FEAT_STATE_DISABLED 0 +#define FEAT_STATE_ALWAYS 1 +#define FEAT_STATE_CHECK 2 + +#endif /* FEAT_DETECT_H */ diff --git a/include/common/image_decompress.h b/include/common/image_decompress.h new file mode 100644 index 0000000..bb35c3b --- /dev/null +++ b/include/common/image_decompress.h @@ -0,0 +1,24 @@ +/* + * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef IMAGE_DECOMPRESS_H +#define IMAGE_DECOMPRESS_H + +#include <stddef.h> +#include <stdint.h> + +struct image_info; + +typedef int (decompressor_t)(uintptr_t *in_buf, size_t in_len, + uintptr_t *out_buf, size_t out_len, + uintptr_t work_buf, size_t work_len); + +void image_decompress_init(uintptr_t buf_base, uint32_t buf_size, + decompressor_t *decompressor); +void image_decompress_prepare(struct image_info *info); +int image_decompress(struct image_info *info); + +#endif /* IMAGE_DECOMPRESS_H */ diff --git a/include/common/interrupt_props.h b/include/common/interrupt_props.h new file mode 100644 index 0000000..681c896 --- /dev/null +++ b/include/common/interrupt_props.h @@ -0,0 +1,29 @@ +/* + * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef INTERRUPT_PROPS_H +#define INTERRUPT_PROPS_H + +#ifndef __ASSEMBLER__ + +/* Create an interrupt property descriptor from various interrupt properties */ +#define INTR_PROP_DESC(num, pri, grp, cfg) \ + { \ + .intr_num = (num), \ + .intr_pri = (pri), \ + .intr_grp = (grp), \ + .intr_cfg = (cfg), \ + } + +typedef struct interrupt_prop { + unsigned int intr_num:13; + unsigned int intr_pri:8; + unsigned int intr_grp:2; + unsigned int intr_cfg:2; +} interrupt_prop_t; + +#endif /* __ASSEMBLER__ */ +#endif /* INTERRUPT_PROPS_H */ diff --git a/include/common/nv_cntr_ids.h b/include/common/nv_cntr_ids.h new file mode 100644 index 0000000..a15c431 --- /dev/null +++ b/include/common/nv_cntr_ids.h @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2020, Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#define TRUSTED_NV_CTR_ID U(0) +#define NON_TRUSTED_NV_CTR_ID U(1) +#define MAX_NV_CTR_IDS U(2) diff --git a/include/common/param_header.h b/include/common/param_header.h new file mode 100644 index 0000000..4dab4e3 --- /dev/null +++ b/include/common/param_header.h @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef PARAM_HEADER_H +#define PARAM_HEADER_H + +#include <stdbool.h> + +#ifndef __ASSEMBLER__ +#include <stdint.h> +#endif /*__ASSEMBLER__*/ + +#include <export/common/param_header_exp.h> + +#define VERSION_1 PARAM_VERSION_1 +#define VERSION_2 PARAM_VERSION_2 + +#define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \ + (_p)->h.type = (uint8_t)(_type); \ + (_p)->h.version = (uint8_t)(_ver); \ + (_p)->h.size = (uint16_t)sizeof(*(_p)); \ + (_p)->h.attr = (uint32_t)(_attr) ; \ + } while (false) + +/* Following is used for populating structure members statically. */ +#define SET_STATIC_PARAM_HEAD(_p, _type, _ver, _p_type, _attr) \ + ._p.h.type = (uint8_t)(_type), \ + ._p.h.version = (uint8_t)(_ver), \ + ._p.h.size = (uint16_t)sizeof(_p_type), \ + ._p.h.attr = (uint32_t)(_attr) + +#endif /* PARAM_HEADER_H */ diff --git a/include/common/romlib.h b/include/common/romlib.h new file mode 100644 index 0000000..7f53c47 --- /dev/null +++ b/include/common/romlib.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ROMLIB_H +#define ROMLIB_H + +#define ROMLIB_MAJOR 0 +#define ROMLIB_MINOR 1 +#define ROMLIB_VERSION ((ROMLIB_MAJOR << 8) | ROMLIB_MINOR) + +int rom_lib_init(int version); + +#endif /* ROMLIB_H */ diff --git a/include/common/runtime_svc.h b/include/common/runtime_svc.h new file mode 100644 index 0000000..26e8d6f --- /dev/null +++ b/include/common/runtime_svc.h @@ -0,0 +1,138 @@ +/* + * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef RUNTIME_SVC_H +#define RUNTIME_SVC_H + +#include <common/bl_common.h> /* to include exception types */ +#include <lib/cassert.h> +#include <lib/utils_def.h> +#include <smccc_helpers.h> /* to include SMCCC definitions */ + +/******************************************************************************* + * Structure definition, typedefs & constants for the runtime service framework + ******************************************************************************/ + +/* + * Constants to allow the assembler access a runtime service + * descriptor + */ +#ifdef __aarch64__ +#define RT_SVC_SIZE_LOG2 U(5) +#define RT_SVC_DESC_INIT U(16) +#define RT_SVC_DESC_HANDLE U(24) +#else +#define RT_SVC_SIZE_LOG2 U(4) +#define RT_SVC_DESC_INIT U(8) +#define RT_SVC_DESC_HANDLE U(12) +#endif /* __aarch64__ */ +#define SIZEOF_RT_SVC_DESC (U(1) << RT_SVC_SIZE_LOG2) + + +/* + * In SMCCC 1.X, the function identifier has 6 bits for the owning entity number + * and a single bit for the type of smc call. When taken together, those values + * limit the maximum number of runtime services to 128. + */ +#define MAX_RT_SVCS U(128) + +#ifndef __ASSEMBLER__ + +/* Prototype for runtime service initializing function */ +typedef int32_t (*rt_svc_init_t)(void); + +/* + * Prototype for runtime service SMC handler function. x0 (SMC Function ID) to + * x4 are as passed by the caller. Rest of the arguments to SMC and the context + * can be accessed using the handle pointer. The cookie parameter is reserved + * for future use + */ +typedef uintptr_t (*rt_svc_handle_t)(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, + void *cookie, + void *handle, + u_register_t flags); +typedef struct rt_svc_desc { + uint8_t start_oen; + uint8_t end_oen; + uint8_t call_type; + const char *name; + rt_svc_init_t init; + rt_svc_handle_t handle; +} rt_svc_desc_t; + +/* + * Convenience macros to declare a service descriptor + */ +#define DECLARE_RT_SVC(_name, _start, _end, _type, _setup, _smch) \ + static const rt_svc_desc_t __svc_desc_ ## _name \ + __section(".rt_svc_descs") __used = { \ + .start_oen = (_start), \ + .end_oen = (_end), \ + .call_type = (_type), \ + .name = #_name, \ + .init = (_setup), \ + .handle = (_smch) \ + } + +/* + * Compile time assertions related to the 'rt_svc_desc' structure to: + * 1. ensure that the assembler and the compiler view of the size + * of the structure are the same. + * 2. ensure that the assembler and the compiler see the initialisation + * routine at the same offset. + * 3. ensure that the assembler and the compiler see the handler + * routine at the same offset. + */ +CASSERT((sizeof(rt_svc_desc_t) == SIZEOF_RT_SVC_DESC), + assert_sizeof_rt_svc_desc_mismatch); +CASSERT(RT_SVC_DESC_INIT == __builtin_offsetof(rt_svc_desc_t, init), + assert_rt_svc_desc_init_offset_mismatch); +CASSERT(RT_SVC_DESC_HANDLE == __builtin_offsetof(rt_svc_desc_t, handle), + assert_rt_svc_desc_handle_offset_mismatch); + + +/* + * This function combines the call type and the owning entity number + * corresponding to a runtime service to generate a unique owning entity number. + * This unique oen is used to access an entry in the 'rt_svc_descs_indices' + * array. The entry contains the index of the service descriptor in the + * 'rt_svc_descs' array. + */ +static inline uint32_t get_unique_oen(uint32_t oen, uint32_t call_type) +{ + return ((call_type & FUNCID_TYPE_MASK) << FUNCID_OEN_WIDTH) | + (oen & FUNCID_OEN_MASK); +} + +/* + * This function generates the unique owning entity number from the SMC Function + * ID. This unique oen is used to access an entry in the 'rt_svc_descs_indices' + * array to invoke the corresponding runtime service handler during SMC + * handling. + */ +static inline uint32_t get_unique_oen_from_smc_fid(uint32_t fid) +{ + return get_unique_oen(GET_SMC_OEN(fid), GET_SMC_TYPE(fid)); +} + +/******************************************************************************* + * Function & variable prototypes + ******************************************************************************/ +void runtime_svc_init(void); +uintptr_t handle_runtime_svc(uint32_t smc_fid, void *cookie, void *handle, + unsigned int flags); +IMPORT_SYM(uintptr_t, __RT_SVC_DESCS_START__, RT_SVC_DESCS_START); +IMPORT_SYM(uintptr_t, __RT_SVC_DESCS_END__, RT_SVC_DESCS_END); +void init_crash_reporting(void); + +extern uint8_t rt_svc_descs_indices[MAX_RT_SVCS]; + +#endif /*__ASSEMBLER__*/ +#endif /* RUNTIME_SVC_H */ diff --git a/include/common/tbbr/cot_def.h b/include/common/tbbr/cot_def.h new file mode 100644 index 0000000..bf23917 --- /dev/null +++ b/include/common/tbbr/cot_def.h @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef COT_DEF_H +#define COT_DEF_H + +/* + * Guard here with availability of mbedtls config since PLAT=lx2162aqds + * uses custom tbbr from 'drivers/nxp/auth/tbbr/tbbr_cot.c' and also may + * build without mbedtls folder only with TRUSTED_BOOT enabled. + */ +#ifdef MBEDTLS_CONFIG_FILE +#include <mbedtls/version.h> +#endif + +/* TBBR CoT definitions */ +#if defined(SPD_spmd) +#define COT_MAX_VERIFIED_PARAMS 8 +#elif defined(ARM_COT_cca) +#define COT_MAX_VERIFIED_PARAMS 8 +#else +#define COT_MAX_VERIFIED_PARAMS 4 +#endif + +/* + * Maximum key and hash sizes (in DER format). + * + * Both RSA and ECDSA keys may be used at the same time. In this case, the key + * buffers must be big enough to hold either. As RSA keys are bigger than ECDSA + * ones for all key sizes we support, they impose the minimum size of these + * buffers. + * + * If the platform employs its own mbedTLS configuration, it is the platform's + * responsibility to define TF_MBEDTLS_USE_RSA or TF_MBEDTLS_USE_ECDSA to + * establish the appropriate PK_DER_LEN size. + */ +#ifdef MBEDTLS_CONFIG_FILE +#if TF_MBEDTLS_USE_RSA +#if TF_MBEDTLS_KEY_SIZE == 1024 +#define PK_DER_LEN 162 +#elif TF_MBEDTLS_KEY_SIZE == 2048 +#define PK_DER_LEN 294 +#elif TF_MBEDTLS_KEY_SIZE == 3072 +#define PK_DER_LEN 422 +#elif TF_MBEDTLS_KEY_SIZE == 4096 +#define PK_DER_LEN 550 +#else +#error "Invalid value for TF_MBEDTLS_KEY_SIZE" +#endif +#elif TF_MBEDTLS_USE_ECDSA +#if TF_MBEDTLS_KEY_SIZE == 384 +#define PK_DER_LEN 120 +#elif TF_MBEDTLS_KEY_SIZE == 256 +#define PK_DER_LEN 92 +#else +#error "Invalid value for TF_MBEDTLS_KEY_SIZE" +#endif +#else +#error "Invalid value of algorithm" +#endif /* TF_MBEDTLS_USE_RSA */ + +#if TF_MBEDTLS_HASH_ALG_ID == TF_MBEDTLS_SHA256 +#define HASH_DER_LEN 51 +#elif TF_MBEDTLS_HASH_ALG_ID == TF_MBEDTLS_SHA384 +#define HASH_DER_LEN 67 +#elif TF_MBEDTLS_HASH_ALG_ID == TF_MBEDTLS_SHA512 +#define HASH_DER_LEN 83 +#else +#error "Invalid value for TF_MBEDTLS_HASH_ALG_ID" +#endif +#endif /* MBEDTLS_CONFIG_FILE */ + +#endif /* COT_DEF_H */ diff --git a/include/common/tbbr/tbbr_img_def.h b/include/common/tbbr/tbbr_img_def.h new file mode 100644 index 0000000..e1c8c29 --- /dev/null +++ b/include/common/tbbr/tbbr_img_def.h @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef TBBR_IMG_DEF_H +#define TBBR_IMG_DEF_H + +#include <export/common/tbbr/tbbr_img_def_exp.h> + +#if defined(SPD_spmd) +#define SIP_SP_CONTENT_CERT_ID MAX_IMAGE_IDS +#define PLAT_SP_CONTENT_CERT_ID (MAX_IMAGE_IDS + 1) +#define SP_PKG1_ID (MAX_IMAGE_IDS + 2) +#define SP_PKG2_ID (MAX_IMAGE_IDS + 3) +#define SP_PKG3_ID (MAX_IMAGE_IDS + 4) +#define SP_PKG4_ID (MAX_IMAGE_IDS + 5) +#define SP_PKG5_ID (MAX_IMAGE_IDS + 6) +#define SP_PKG6_ID (MAX_IMAGE_IDS + 7) +#define SP_PKG7_ID (MAX_IMAGE_IDS + 8) +#define SP_PKG8_ID (MAX_IMAGE_IDS + 9) +#define MAX_SP_IDS U(8) +#define MAX_IMG_IDS_WITH_SPMDS (MAX_IMAGE_IDS + MAX_SP_IDS + U(2)) +#else +#define MAX_IMG_IDS_WITH_SPMDS MAX_IMAGE_IDS +#endif + +#ifdef PLAT_TBBR_IMG_DEF +#include <plat_tbbr_img_def.h> +#endif + +#ifndef MAX_NUMBER_IDS +#define MAX_NUMBER_IDS MAX_IMG_IDS_WITH_SPMDS +#endif + +#endif /* TBBR_IMG_DEF_H */ diff --git a/include/common/tf_crc32.h b/include/common/tf_crc32.h new file mode 100644 index 0000000..38c56a5 --- /dev/null +++ b/include/common/tf_crc32.h @@ -0,0 +1,16 @@ +/* + * Copyright (c) 2021, Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef TF_CRC32_H +#define TF_CRC32_H + +#include <stddef.h> +#include <stdint.h> + +/* compute CRC using Arm intrinsic function */ +uint32_t tf_crc32(uint32_t crc, const unsigned char *buf, size_t size); + +#endif /* TF_CRC32_H */ diff --git a/include/common/uuid.h b/include/common/uuid.h new file mode 100644 index 0000000..6348804 --- /dev/null +++ b/include/common/uuid.h @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2021-2023, Arm Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef UUID_COMMON_H +#define UUID_COMMON_H + +#include <stdbool.h> +#include <stdint.h> + +#define UUID_BYTES_LENGTH 16 +#define UUID_STRING_LENGTH 36 + +int read_uuid(uint8_t *dest, char *uuid); +bool uuid_match(uint32_t *uuid1, uint32_t *uuid2); +void copy_uuid(uint32_t *to_uuid, uint32_t *from_uuid); +bool is_null_uuid(uint32_t *uuid); + +#endif /* UUID_COMMON_H */ |