diff options
Diffstat (limited to 'plat/mediatek/drivers/dp')
-rw-r--r-- | plat/mediatek/drivers/dp/mt_dp.c | 79 | ||||
-rw-r--r-- | plat/mediatek/drivers/dp/mt_dp.h | 28 | ||||
-rw-r--r-- | plat/mediatek/drivers/dp/rules.mk | 14 |
3 files changed, 121 insertions, 0 deletions
diff --git a/plat/mediatek/drivers/dp/mt_dp.c b/plat/mediatek/drivers/dp/mt_dp.c new file mode 100644 index 0000000..8aa246f --- /dev/null +++ b/plat/mediatek/drivers/dp/mt_dp.c @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2020-2022, MediaTek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include <inttypes.h> + +#include <common/debug.h> +#include <lib/mmio.h> +#include <mt_dp.h> +#include <mtk_sip_svc.h> +#include <platform_def.h> + +static uint32_t dp_write_sec_reg(uint32_t is_edp, uint32_t offset, + uint32_t value, uint32_t mask) +{ + uint32_t reg = (is_edp != 0U) ? EDP_SEC_BASE : DP_SEC_BASE; + + mmio_clrsetbits_32(reg + offset, mask, value); + + return mmio_read_32(reg + offset); +} + +int32_t dp_secure_handler(uint64_t cmd, uint64_t para, uint32_t *val) +{ + int32_t ret = 0L; + uint32_t is_edp = 0UL; + uint32_t regval = 0UL; + uint32_t regmsk = 0UL; + uint32_t fldmask = 0UL; + + if ((cmd > DP_ATF_CMD_COUNT) || (val == NULL)) { + INFO("dp_secure_handler error cmd 0x%" PRIx64 "\n", cmd); + return MTK_SIP_E_INVALID_PARAM; + } + + switch (cmd) { + case DP_ATF_DP_VIDEO_UNMUTE: + INFO("[%s] DP_ATF_DP_VIDEO_UNMUTE\n", __func__); + is_edp = DP_ATF_TYPE_DP; + ret = MTK_SIP_E_SUCCESS; + break; + case DP_ATF_EDP_VIDEO_UNMUTE: + INFO("[%s] DP_ATF_EDP_VIDEO_UNMUTE\n", __func__); + is_edp = DP_ATF_TYPE_EDP; + ret = MTK_SIP_E_SUCCESS; + break; + default: + ret = MTK_SIP_E_INVALID_PARAM; + break; + } + + if (ret == MTK_SIP_E_SUCCESS) { + regmsk = (VIDEO_MUTE_SEL_SECURE_FLDMASK | + VIDEO_MUTE_SW_SECURE_FLDMASK); + if (para > 0U) { + fldmask = VIDEO_MUTE_SW_SECURE_FLDMASK; + } else { + fldmask = 0; + } + + regval = (VIDEO_MUTE_SEL_SECURE_FLDMASK | fldmask); + *val = dp_write_sec_reg(is_edp, DP_TX_SECURE_REG11, + regval, regmsk); + } + + return ret; +} + +u_register_t mtk_dp_sip_handler(u_register_t x1, u_register_t x2, + u_register_t x3, u_register_t x4, + void *handle, struct smccc_res *smccc_ret) +{ + uint32_t ret_val; + + return dp_secure_handler(x1, x2, &ret_val); +} +DECLARE_SMC_HANDLER(MTK_SIP_DP_CONTROL, mtk_dp_sip_handler); diff --git a/plat/mediatek/drivers/dp/mt_dp.h b/plat/mediatek/drivers/dp/mt_dp.h new file mode 100644 index 0000000..d5dad29 --- /dev/null +++ b/plat/mediatek/drivers/dp/mt_dp.h @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2020-2022, MediaTek Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef MT_DP_H +#define MT_DP_H + +#define DP_TX_SECURE_REG11 (0x2c) + +#define VIDEO_MUTE_SEL_SECURE_FLDMASK (0x10) +#define VIDEO_MUTE_SW_SECURE_FLDMASK (0x8) + +enum DP_ATF_HW_TYPE { + DP_ATF_TYPE_DP = 0, + DP_ATF_TYPE_EDP = 1 +}; + +enum DP_ATF_CMD { + DP_ATF_DP_VIDEO_UNMUTE = 0x20, + DP_ATF_EDP_VIDEO_UNMUTE, + DP_ATF_CMD_COUNT +}; + +int32_t dp_secure_handler(uint64_t cmd, uint64_t para, uint32_t *val); + +#endif diff --git a/plat/mediatek/drivers/dp/rules.mk b/plat/mediatek/drivers/dp/rules.mk new file mode 100644 index 0000000..786d514 --- /dev/null +++ b/plat/mediatek/drivers/dp/rules.mk @@ -0,0 +1,14 @@ +# +# Copyright (c) 2022, MediaTek Inc. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause +# + +LOCAL_DIR := $(call GET_LOCAL_DIR) + +MODULE := dp +LOCAL_SRCS-y := $(LOCAL_DIR)/mt_dp.c + +PLAT_INCLUDES += -I${LOCAL_DIR} + +$(eval $(call MAKE_MODULE,$(MODULE),$(LOCAL_SRCS-y),$(MTK_BL))) |