summaryrefslogtreecommitdiffstats
path: root/security/nss/lib/freebl/intel-gcm.s
blob: 5b5cf5d4bb7821278166f3a089db3b0f89fa2677 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
# LICENSE:                                                                  
# This submission to NSS is to be made available under the terms of the
# Mozilla Public License, v. 2.0. You can obtain one at http:         
# //mozilla.org/MPL/2.0/. 
################################################################################
# Copyright(c) 2012, Intel Corp.

.align  16
.Lone:
.quad 1,0
.Ltwo:
.quad 2,0
.Lbswap_mask:
.byte 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
.Lshuff_mask:
.quad 0x0f0f0f0f0f0f0f0f, 0x0f0f0f0f0f0f0f0f
.Lpoly:
.quad 0x1, 0xc200000000000000 


################################################################################
# Generates the final GCM tag
# void intel_aes_gcmTAG(uint8_t Htbl[16*16], uint8_t *Tp, uint64_t Mlen, uint64_t Alen, uint8_t* X0, uint8_t* TAG);
.type intel_aes_gcmTAG,@function
.globl intel_aes_gcmTAG
.align 16
intel_aes_gcmTAG:

.set  Htbl, %rdi
.set  Tp, %rsi
.set  Mlen, %rdx
.set  Alen, %rcx
.set  X0, %r8
.set  TAG, %r9

.set T,%xmm0
.set TMP0,%xmm1

   vmovdqu  (Tp), T
   vpshufb  .Lbswap_mask(%rip), T, T
   vpxor    TMP0, TMP0, TMP0
   shl      $3, Mlen
   shl      $3, Alen
   vpinsrq  $0, Mlen, TMP0, TMP0
   vpinsrq  $1, Alen, TMP0, TMP0
   vpxor    TMP0, T, T
   vmovdqu  (Htbl), TMP0
   call     GFMUL
   vpshufb  .Lbswap_mask(%rip), T, T
   vpxor    (X0), T, T
   vmovdqu  T, (TAG)
   
ret
.size intel_aes_gcmTAG, .-intel_aes_gcmTAG
################################################################################
# Generates the H table
# void intel_aes_gcmINIT(uint8_t Htbl[16*16], uint8_t *KS, int NR);
.type intel_aes_gcmINIT,@function
.globl intel_aes_gcmINIT
.align 16
intel_aes_gcmINIT:
   
.set  Htbl, %rdi
.set  KS, %rsi
.set  NR, %edx

.set T,%xmm0
.set TMP0,%xmm1

CALCULATE_POWERS_OF_H:
    vmovdqu      16*0(KS), T
    vaesenc      16*1(KS), T, T
    vaesenc      16*2(KS), T, T
    vaesenc      16*3(KS), T, T
    vaesenc      16*4(KS), T, T
    vaesenc      16*5(KS), T, T
    vaesenc      16*6(KS), T, T
    vaesenc      16*7(KS), T, T
    vaesenc      16*8(KS), T, T
    vaesenc      16*9(KS), T, T
    vmovdqu      16*10(KS), TMP0
    cmp          $10, NR
    je           .LH0done
    vaesenc      16*10(KS), T, T
    vaesenc      16*11(KS), T, T
    vmovdqu      16*12(KS), TMP0
    cmp          $12, NR
    je           .LH0done
    vaesenc      16*12(KS), T, T
    vaesenc      16*13(KS), T, T
    vmovdqu      16*14(KS), TMP0
  
.LH0done:
    vaesenclast  TMP0, T, T

    vpshufb      .Lbswap_mask(%rip), T, T  

    vmovdqu	T, TMP0
    # Calculate H` = GFMUL(H, 2)
    vpsrld	$7 , T , %xmm3
    vmovdqu	.Lshuff_mask(%rip), %xmm4
    vpshufb	%xmm4, %xmm3 , %xmm3
    movq	$0xff00 , %rax
    vmovq	%rax, %xmm4
    vpshufb	%xmm3, %xmm4 , %xmm4
    vmovdqu	.Lpoly(%rip), %xmm5
    vpand	%xmm4, %xmm5, %xmm5
    vpsrld	$31, T, %xmm3
    vpslld	$1, T, %xmm4
    vpslldq	$4, %xmm3, %xmm3
    vpxor	%xmm3, %xmm4, T  #xmm1 holds now p(x)<<1

    #adding p(x)<<1 to xmm5
    vpxor     %xmm5, T , T
    vmovdqu   T, TMP0
    vmovdqu   T, (Htbl)     # H * 2
    call  GFMUL
    vmovdqu  T, 16(Htbl)    # H^2 * 2
    call  GFMUL
    vmovdqu  T, 32(Htbl)    # H^3 * 2
    call  GFMUL
    vmovdqu  T, 48(Htbl)    # H^4 * 2
    call  GFMUL
    vmovdqu  T, 64(Htbl)    # H^5 * 2
    call  GFMUL
    vmovdqu  T, 80(Htbl)    # H^6 * 2
    call  GFMUL
    vmovdqu  T, 96(Htbl)    # H^7 * 2
    call  GFMUL
    vmovdqu  T, 112(Htbl)   # H^8 * 2  

    # Precalculations for the reduce 4 step
    vpshufd  $78, (Htbl), %xmm8
    vpshufd  $78, 16(Htbl), %xmm9
    vpshufd  $78, 32(Htbl), %xmm10
    vpshufd  $78, 48(Htbl), %xmm11
    vpshufd  $78, 64(Htbl), %xmm12
    vpshufd  $78, 80(Htbl), %xmm13
    vpshufd  $78, 96(Htbl), %xmm14
    vpshufd  $78, 112(Htbl), %xmm15

    vpxor  (Htbl), %xmm8, %xmm8
    vpxor  16(Htbl), %xmm9, %xmm9
    vpxor  32(Htbl), %xmm10, %xmm10
    vpxor  48(Htbl), %xmm11, %xmm11
    vpxor  64(Htbl), %xmm12, %xmm12
    vpxor  80(Htbl), %xmm13, %xmm13
    vpxor  96(Htbl), %xmm14, %xmm14
    vpxor  112(Htbl), %xmm15, %xmm15

    vmovdqu   %xmm8, 128(Htbl)
    vmovdqu   %xmm9, 144(Htbl)
    vmovdqu   %xmm10, 160(Htbl)
    vmovdqu   %xmm11, 176(Htbl)
    vmovdqu   %xmm12, 192(Htbl)
    vmovdqu   %xmm13, 208(Htbl)
    vmovdqu   %xmm14, 224(Htbl)
    vmovdqu   %xmm15, 240(Htbl)

    ret
.size intel_aes_gcmINIT, .-intel_aes_gcmINIT
################################################################################
# Authenticate only
# void intel_aes_gcmAAD(uint8_t Htbl[16*16], uint8_t *AAD, uint64_t Alen, uint8_t *Tp);

.globl  intel_aes_gcmAAD
.type   intel_aes_gcmAAD,@function
.align  16
intel_aes_gcmAAD:

.set DATA, %xmm0
.set T, %xmm1
.set BSWAP_MASK, %xmm2
.set TMP0, %xmm3
.set TMP1, %xmm4
.set TMP2, %xmm5
.set TMP3, %xmm6
.set TMP4, %xmm7
.set Xhi, %xmm9

.set Htbl, %rdi
.set inp, %rsi
.set len, %rdx
.set Tp, %rcx

.set hlp0, %r11

.macro KARATSUBA_AAD i
    vpclmulqdq  $0x00, 16*\i(Htbl), DATA, TMP3
    vpxor       TMP3, TMP0, TMP0
    vpclmulqdq  $0x11, 16*\i(Htbl), DATA, TMP3
    vpxor       TMP3, TMP1, TMP1
    vpshufd     $78,  DATA, TMP3
    vpxor       DATA, TMP3, TMP3
    vpclmulqdq  $0x00, 16*(\i+8)(Htbl), TMP3, TMP3
    vpxor       TMP3, TMP2, TMP2
.endm

    test  len, len
    jnz   .LbeginAAD
    ret

.LbeginAAD:

   push  hlp0
   vzeroupper
   
   vmovdqa  .Lbswap_mask(%rip), BSWAP_MASK
   
   vpxor    Xhi, Xhi, Xhi
   
   vmovdqu  (Tp),T
   vpshufb  BSWAP_MASK,T,T

   # we hash 8 block each iteration, if the total amount of blocks is not a multiple of 8, we hash the first n%8 blocks first
    mov     len, hlp0
    and	    $~-128, hlp0

    jz      .Lmod_loop

    sub     hlp0, len
    sub     $16, hlp0

   #hash first prefix block
	vmovdqu (inp), DATA
	vpshufb  BSWAP_MASK, DATA, DATA
	vpxor    T, DATA, DATA
	
	vpclmulqdq  $0x00, (Htbl, hlp0), DATA, TMP0
	vpclmulqdq  $0x11, (Htbl, hlp0), DATA, TMP1
	vpshufd     $78, DATA, TMP2
	vpxor       DATA, TMP2, TMP2
	vpclmulqdq  $0x00, 16*8(Htbl, hlp0), TMP2, TMP2
	
	lea	    16(inp), inp
	test    hlp0, hlp0
	jnz	    .Lpre_loop
	jmp	    .Lred1

    #hash remaining prefix bocks (up to 7 total prefix blocks)
.align 64
.Lpre_loop:

    sub	$16, hlp0

    vmovdqu     (inp),DATA           # next data block
    vpshufb     BSWAP_MASK,DATA,DATA

    vpclmulqdq  $0x00, (Htbl,hlp0), DATA, TMP3
    vpxor       TMP3, TMP0, TMP0
    vpclmulqdq  $0x11, (Htbl,hlp0), DATA, TMP3
    vpxor       TMP3, TMP1, TMP1
    vpshufd	    $78, DATA, TMP3
    vpxor       DATA, TMP3, TMP3
    vpclmulqdq  $0x00, 16*8(Htbl,hlp0), TMP3, TMP3
    vpxor       TMP3, TMP2, TMP2

    test	hlp0, hlp0

    lea	16(inp), inp

    jnz	.Lpre_loop
	
.Lred1:
    vpxor       TMP0, TMP2, TMP2
    vpxor       TMP1, TMP2, TMP2
    vpsrldq     $8, TMP2, TMP3
    vpslldq     $8, TMP2, TMP2

    vpxor       TMP3, TMP1, Xhi
    vpxor       TMP2, TMP0, T
	
.align 64
.Lmod_loop:
    sub	$0x80, len
    jb	.Ldone

    vmovdqu     16*7(inp),DATA		# Ii
    vpshufb     BSWAP_MASK,DATA,DATA

    vpclmulqdq  $0x00, (Htbl), DATA, TMP0
    vpclmulqdq  $0x11, (Htbl), DATA, TMP1
    vpshufd     $78, DATA, TMP2
    vpxor       DATA, TMP2, TMP2
    vpclmulqdq  $0x00, 16*8(Htbl), TMP2, TMP2
    #########################################################
    vmovdqu     16*6(inp),DATA
    vpshufb     BSWAP_MASK,DATA,DATA
    KARATSUBA_AAD 1
    #########################################################
    vmovdqu     16*5(inp),DATA
    vpshufb     BSWAP_MASK,DATA,DATA

    vpclmulqdq  $0x10, .Lpoly(%rip), T, TMP4         #reduction stage 1a
    vpalignr    $8, T, T, T

    KARATSUBA_AAD 2

    vpxor       TMP4, T, T                 #reduction stage 1b
    #########################################################
    vmovdqu		16*4(inp),DATA
    vpshufb	    BSWAP_MASK,DATA,DATA

    KARATSUBA_AAD 3
    #########################################################
    vmovdqu     16*3(inp),DATA
    vpshufb     BSWAP_MASK,DATA,DATA

    vpclmulqdq  $0x10, .Lpoly(%rip), T, TMP4         #reduction stage 2a
    vpalignr    $8, T, T, T

    KARATSUBA_AAD 4

    vpxor       TMP4, T, T                 #reduction stage 2b
    #########################################################
    vmovdqu     16*2(inp),DATA
    vpshufb     BSWAP_MASK,DATA,DATA

    KARATSUBA_AAD 5

    vpxor       Xhi, T, T                  #reduction finalize
    #########################################################
    vmovdqu     16*1(inp),DATA
    vpshufb     BSWAP_MASK,DATA,DATA

    KARATSUBA_AAD 6
    #########################################################
    vmovdqu     16*0(inp),DATA
    vpshufb     BSWAP_MASK,DATA,DATA
    vpxor       T,DATA,DATA

    KARATSUBA_AAD 7
    #########################################################
    vpxor       TMP0, TMP2, TMP2              # karatsuba fixup
    vpxor       TMP1, TMP2, TMP2
    vpsrldq     $8, TMP2, TMP3
    vpslldq     $8, TMP2, TMP2

    vpxor       TMP3, TMP1, Xhi
    vpxor       TMP2, TMP0, T

    lea	16*8(inp), inp
    jmp .Lmod_loop
    #########################################################

.Ldone:
    vpclmulqdq  $0x10, .Lpoly(%rip), T, TMP3
    vpalignr    $8, T, T, T
    vpxor       TMP3, T, T

    vpclmulqdq  $0x10, .Lpoly(%rip), T, TMP3
    vpalignr    $8, T, T, T
    vpxor       TMP3, T, T

    vpxor       Xhi, T, T
   
.Lsave:
    vpshufb     BSWAP_MASK,T, T
    vmovdqu     T,(Tp)
    vzeroupper

    pop hlp0
    ret
.size   intel_aes_gcmAAD,.-intel_aes_gcmAAD

################################################################################
# Encrypt and Authenticate
# void intel_aes_gcmENC(uint8_t* PT, uint8_t* CT, void *Gctx,uint64_t len);
.type intel_aes_gcmENC,@function
.globl intel_aes_gcmENC
.align 16
intel_aes_gcmENC:

.set PT,%rdi
.set CT,%rsi
.set Htbl, %rdx
.set len, %rcx
.set KS,%r9
.set NR,%r10d

.set Gctx, %rdx

.set T,%xmm0
.set TMP0,%xmm1
.set TMP1,%xmm2
.set TMP2,%xmm3
.set TMP3,%xmm4
.set TMP4,%xmm5
.set TMP5,%xmm6
.set CTR0,%xmm7
.set CTR1,%xmm8
.set CTR2,%xmm9
.set CTR3,%xmm10
.set CTR4,%xmm11
.set CTR5,%xmm12
.set CTR6,%xmm13
.set CTR7,%xmm14
.set CTR,%xmm15

.macro ROUND i
    vmovdqu \i*16(KS), TMP3
    vaesenc TMP3, CTR0, CTR0
    vaesenc TMP3, CTR1, CTR1
    vaesenc TMP3, CTR2, CTR2
    vaesenc TMP3, CTR3, CTR3
    vaesenc TMP3, CTR4, CTR4
    vaesenc TMP3, CTR5, CTR5
    vaesenc TMP3, CTR6, CTR6
    vaesenc TMP3, CTR7, CTR7
.endm

.macro ROUNDMUL i

    vmovdqu \i*16(%rsp), TMP5
    vmovdqu \i*16(KS), TMP3

    vaesenc TMP3, CTR0, CTR0
    vaesenc TMP3, CTR1, CTR1
    vaesenc TMP3, CTR2, CTR2
    vaesenc TMP3, CTR3, CTR3

    vpshufd $78, TMP5, TMP4
    vpxor   TMP5, TMP4, TMP4

    vaesenc TMP3, CTR4, CTR4
    vaesenc TMP3, CTR5, CTR5
    vaesenc TMP3, CTR6, CTR6
    vaesenc TMP3, CTR7, CTR7

    vpclmulqdq  $0x00, 128+\i*16(Htbl), TMP4, TMP3
    vpxor       TMP3, TMP0, TMP0
    vmovdqa     \i*16(Htbl), TMP4
    vpclmulqdq  $0x11, TMP4, TMP5, TMP3
    vpxor       TMP3, TMP1, TMP1
    vpclmulqdq  $0x00, TMP4, TMP5, TMP3
    vpxor       TMP3, TMP2, TMP2
  
.endm

.macro KARATSUBA i
    vmovdqu \i*16(%rsp), TMP5

    vpclmulqdq  $0x11, 16*\i(Htbl), TMP5, TMP3
    vpxor       TMP3, TMP1, TMP1
    vpclmulqdq  $0x00, 16*\i(Htbl), TMP5, TMP3
    vpxor       TMP3, TMP2, TMP2
    vpshufd     $78, TMP5, TMP3
    vpxor       TMP5, TMP3, TMP5
    vpclmulqdq  $0x00, 128+\i*16(Htbl), TMP5, TMP3
    vpxor       TMP3, TMP0, TMP0
.endm

    test len, len
    jnz  .Lbegin
    ret
   
.Lbegin:

    vzeroupper
    push %rbp
    push %rbx

    movq %rsp, %rbp   
    sub  $128, %rsp
    andq $-16, %rsp

    vmovdqu  288(Gctx), CTR
    vmovdqu  272(Gctx), T
    mov  304(Gctx), KS
# AESContext->Nr
    mov  244(KS), NR

    vpshufb  .Lbswap_mask(%rip), CTR, CTR
    vpshufb  .Lbswap_mask(%rip), T, T

    cmp  $128, len
    jb   .LDataSingles
   
# Encrypt the first eight blocks
    sub     $128, len
    vmovdqa CTR, CTR0
    vpaddd  .Lone(%rip), CTR0, CTR1
    vpaddd  .Ltwo(%rip), CTR0, CTR2
    vpaddd  .Lone(%rip), CTR2, CTR3
    vpaddd  .Ltwo(%rip), CTR2, CTR4
    vpaddd  .Lone(%rip), CTR4, CTR5
    vpaddd  .Ltwo(%rip), CTR4, CTR6
    vpaddd  .Lone(%rip), CTR6, CTR7
    vpaddd  .Ltwo(%rip), CTR6, CTR

    vpshufb .Lbswap_mask(%rip), CTR0, CTR0
    vpshufb .Lbswap_mask(%rip), CTR1, CTR1
    vpshufb .Lbswap_mask(%rip), CTR2, CTR2
    vpshufb .Lbswap_mask(%rip), CTR3, CTR3
    vpshufb .Lbswap_mask(%rip), CTR4, CTR4
    vpshufb .Lbswap_mask(%rip), CTR5, CTR5
    vpshufb .Lbswap_mask(%rip), CTR6, CTR6
    vpshufb .Lbswap_mask(%rip), CTR7, CTR7

    vpxor   (KS), CTR0, CTR0
    vpxor   (KS), CTR1, CTR1
    vpxor   (KS), CTR2, CTR2
    vpxor   (KS), CTR3, CTR3
    vpxor   (KS), CTR4, CTR4
    vpxor   (KS), CTR5, CTR5
    vpxor   (KS), CTR6, CTR6
    vpxor   (KS), CTR7, CTR7

    ROUND 1
    ROUND 2
    ROUND 3
    ROUND 4
    ROUND 5
    ROUND 6
    ROUND 7
    ROUND 8
    ROUND 9

    vmovdqu 160(KS), TMP5
    cmp $12, NR
    jb  .LLast1

    ROUND 10
    ROUND 11

    vmovdqu 192(KS), TMP5
    cmp $14, NR
    jb  .LLast1

    ROUND 12
    ROUND 13

    vmovdqu 224(KS), TMP5
  
.LLast1:

    vpxor       (PT), TMP5, TMP3
    vaesenclast TMP3, CTR0, CTR0
    vpxor       16(PT), TMP5, TMP3
    vaesenclast TMP3, CTR1, CTR1
    vpxor       32(PT), TMP5, TMP3
    vaesenclast TMP3, CTR2, CTR2
    vpxor       48(PT), TMP5, TMP3
    vaesenclast TMP3, CTR3, CTR3
    vpxor       64(PT), TMP5, TMP3
    vaesenclast TMP3, CTR4, CTR4
    vpxor       80(PT), TMP5, TMP3
    vaesenclast TMP3, CTR5, CTR5
    vpxor       96(PT), TMP5, TMP3
    vaesenclast TMP3, CTR6, CTR6
    vpxor       112(PT), TMP5, TMP3
    vaesenclast TMP3, CTR7, CTR7
    
    vmovdqu     .Lbswap_mask(%rip), TMP3
   
    vmovdqu CTR0, (CT)
    vpshufb TMP3, CTR0, CTR0
    vmovdqu CTR1, 16(CT)
    vpshufb TMP3, CTR1, CTR1
    vmovdqu CTR2, 32(CT)
    vpshufb TMP3, CTR2, CTR2
    vmovdqu CTR3, 48(CT)
    vpshufb TMP3, CTR3, CTR3
    vmovdqu CTR4, 64(CT)
    vpshufb TMP3, CTR4, CTR4
    vmovdqu CTR5, 80(CT)
    vpshufb TMP3, CTR5, CTR5
    vmovdqu CTR6, 96(CT)
    vpshufb TMP3, CTR6, CTR6
    vmovdqu CTR7, 112(CT)
    vpshufb TMP3, CTR7, CTR7

    lea 128(CT), CT
    lea 128(PT), PT
    jmp .LDataOctets

# Encrypt 8 blocks each time while hashing previous 8 blocks
.align 64
.LDataOctets:
        cmp $128, len
        jb  .LEndOctets
        sub $128, len

        vmovdqa CTR7, TMP5
        vmovdqa CTR6, 1*16(%rsp)
        vmovdqa CTR5, 2*16(%rsp)
        vmovdqa CTR4, 3*16(%rsp)
        vmovdqa CTR3, 4*16(%rsp)
        vmovdqa CTR2, 5*16(%rsp)
        vmovdqa CTR1, 6*16(%rsp)
        vmovdqa CTR0, 7*16(%rsp)

        vmovdqa CTR, CTR0
        vpaddd  .Lone(%rip), CTR0, CTR1
        vpaddd  .Ltwo(%rip), CTR0, CTR2
        vpaddd  .Lone(%rip), CTR2, CTR3
        vpaddd  .Ltwo(%rip), CTR2, CTR4
        vpaddd  .Lone(%rip), CTR4, CTR5
        vpaddd  .Ltwo(%rip), CTR4, CTR6
        vpaddd  .Lone(%rip), CTR6, CTR7
        vpaddd  .Ltwo(%rip), CTR6, CTR

        vmovdqu (KS), TMP4
        vpshufb TMP3, CTR0, CTR0
        vpxor   TMP4, CTR0, CTR0
        vpshufb TMP3, CTR1, CTR1
        vpxor   TMP4, CTR1, CTR1
        vpshufb TMP3, CTR2, CTR2
        vpxor   TMP4, CTR2, CTR2
        vpshufb TMP3, CTR3, CTR3
        vpxor   TMP4, CTR3, CTR3
        vpshufb TMP3, CTR4, CTR4
        vpxor   TMP4, CTR4, CTR4
        vpshufb TMP3, CTR5, CTR5
        vpxor   TMP4, CTR5, CTR5
        vpshufb TMP3, CTR6, CTR6
        vpxor   TMP4, CTR6, CTR6
        vpshufb TMP3, CTR7, CTR7
        vpxor   TMP4, CTR7, CTR7

        vmovdqu     16*0(Htbl), TMP3
        vpclmulqdq  $0x11, TMP3, TMP5, TMP1
        vpclmulqdq  $0x00, TMP3, TMP5, TMP2      
        vpshufd     $78, TMP5, TMP3
        vpxor       TMP5, TMP3, TMP5
        vmovdqu     128+0*16(Htbl), TMP3      
        vpclmulqdq  $0x00, TMP3, TMP5, TMP0

        ROUNDMUL 1

        ROUNDMUL 2

        ROUNDMUL 3

        ROUNDMUL 4

        ROUNDMUL 5

        ROUNDMUL 6

        vpxor   7*16(%rsp), T, TMP5
        vmovdqu 7*16(KS), TMP3

        vaesenc TMP3, CTR0, CTR0
        vaesenc TMP3, CTR1, CTR1
        vaesenc TMP3, CTR2, CTR2
        vaesenc TMP3, CTR3, CTR3

        vpshufd $78, TMP5, TMP4
        vpxor   TMP5, TMP4, TMP4

        vaesenc TMP3, CTR4, CTR4
        vaesenc TMP3, CTR5, CTR5
        vaesenc TMP3, CTR6, CTR6
        vaesenc TMP3, CTR7, CTR7

        vpclmulqdq  $0x11, 7*16(Htbl), TMP5, TMP3
        vpxor       TMP3, TMP1, TMP1
        vpclmulqdq  $0x00, 7*16(Htbl), TMP5, TMP3
        vpxor       TMP3, TMP2, TMP2
        vpclmulqdq  $0x00, 128+7*16(Htbl), TMP4, TMP3
        vpxor       TMP3, TMP0, TMP0

        ROUND 8    
        vmovdqa .Lpoly(%rip), TMP5

        vpxor   TMP1, TMP0, TMP0
        vpxor   TMP2, TMP0, TMP0
        vpsrldq $8, TMP0, TMP3
        vpxor   TMP3, TMP1, TMP4
        vpslldq $8, TMP0, TMP3
        vpxor   TMP3, TMP2, T

        vpclmulqdq  $0x10, TMP5, T, TMP1
        vpalignr    $8, T, T, T
        vpxor       T, TMP1, T

        ROUND 9

        vpclmulqdq  $0x10, TMP5, T, TMP1
        vpalignr    $8, T, T, T
        vpxor       T, TMP1, T

        vmovdqu 160(KS), TMP5
        cmp     $10, NR
        jbe     .LLast2

        ROUND 10
        ROUND 11

        vmovdqu 192(KS), TMP5
        cmp     $12, NR
        jbe     .LLast2

        ROUND 12
        ROUND 13

        vmovdqu 224(KS), TMP5

.LLast2:
      
        vpxor       (PT), TMP5, TMP3
        vaesenclast TMP3, CTR0, CTR0
        vpxor       16(PT), TMP5, TMP3
        vaesenclast TMP3, CTR1, CTR1
        vpxor       32(PT), TMP5, TMP3
        vaesenclast TMP3, CTR2, CTR2
        vpxor       48(PT), TMP5, TMP3
        vaesenclast TMP3, CTR3, CTR3
        vpxor       64(PT), TMP5, TMP3
        vaesenclast TMP3, CTR4, CTR4
        vpxor       80(PT), TMP5, TMP3
        vaesenclast TMP3, CTR5, CTR5
        vpxor       96(PT), TMP5, TMP3
        vaesenclast TMP3, CTR6, CTR6
        vpxor       112(PT), TMP5, TMP3
        vaesenclast TMP3, CTR7, CTR7

        vmovdqu .Lbswap_mask(%rip), TMP3

        vmovdqu CTR0, (CT)
        vpshufb TMP3, CTR0, CTR0
        vmovdqu CTR1, 16(CT)
        vpshufb TMP3, CTR1, CTR1
        vmovdqu CTR2, 32(CT)
        vpshufb TMP3, CTR2, CTR2
        vmovdqu CTR3, 48(CT)
        vpshufb TMP3, CTR3, CTR3
        vmovdqu CTR4, 64(CT)
        vpshufb TMP3, CTR4, CTR4
        vmovdqu CTR5, 80(CT)
        vpshufb TMP3, CTR5, CTR5
        vmovdqu CTR6, 96(CT)
        vpshufb TMP3, CTR6, CTR6
        vmovdqu CTR7,112(CT)
        vpshufb TMP3, CTR7, CTR7

        vpxor   TMP4, T, T

        lea 128(CT), CT
        lea 128(PT), PT
    jmp  .LDataOctets

.LEndOctets:
    
    vmovdqa CTR7, TMP5
    vmovdqa CTR6, 1*16(%rsp)
    vmovdqa CTR5, 2*16(%rsp)
    vmovdqa CTR4, 3*16(%rsp)
    vmovdqa CTR3, 4*16(%rsp)
    vmovdqa CTR2, 5*16(%rsp)
    vmovdqa CTR1, 6*16(%rsp)
    vmovdqa CTR0, 7*16(%rsp)

    vmovdqu     16*0(Htbl), TMP3
    vpclmulqdq  $0x11, TMP3, TMP5, TMP1
    vpclmulqdq  $0x00, TMP3, TMP5, TMP2      
    vpshufd     $78, TMP5, TMP3
    vpxor       TMP5, TMP3, TMP5
    vmovdqu     128+0*16(Htbl), TMP3      
    vpclmulqdq  $0x00, TMP3, TMP5, TMP0

    KARATSUBA 1
    KARATSUBA 2
    KARATSUBA 3      
    KARATSUBA 4
    KARATSUBA 5
    KARATSUBA 6

    vmovdqu     7*16(%rsp), TMP5
    vpxor       T, TMP5, TMP5
    vmovdqu     16*7(Htbl), TMP4            
    vpclmulqdq  $0x11, TMP4, TMP5, TMP3
    vpxor       TMP3, TMP1, TMP1
    vpclmulqdq  $0x00, TMP4, TMP5, TMP3
    vpxor       TMP3, TMP2, TMP2      
    vpshufd     $78, TMP5, TMP3
    vpxor       TMP5, TMP3, TMP5
    vmovdqu     128+7*16(Htbl), TMP4      
    vpclmulqdq  $0x00, TMP4, TMP5, TMP3
    vpxor       TMP3, TMP0, TMP0

    vpxor       TMP1, TMP0, TMP0
    vpxor       TMP2, TMP0, TMP0

    vpsrldq     $8, TMP0, TMP3
    vpxor       TMP3, TMP1, TMP4
    vpslldq     $8, TMP0, TMP3
    vpxor       TMP3, TMP2, T

    vmovdqa     .Lpoly(%rip), TMP2

    vpalignr    $8, T, T, TMP1
    vpclmulqdq  $0x10, TMP2, T, T
    vpxor       T, TMP1, T

    vpalignr    $8, T, T, TMP1
    vpclmulqdq  $0x10, TMP2, T, T
    vpxor       T, TMP1, T

    vpxor       TMP4, T, T

#Here we encrypt any remaining whole block
.LDataSingles:

    cmp $16, len
    jb  .LDataTail
    sub $16, len

    vpshufb .Lbswap_mask(%rip), CTR, TMP1
    vpaddd  .Lone(%rip), CTR, CTR

    vpxor   (KS), TMP1, TMP1
    vaesenc 16*1(KS), TMP1, TMP1
    vaesenc 16*2(KS), TMP1, TMP1
    vaesenc 16*3(KS), TMP1, TMP1
    vaesenc 16*4(KS), TMP1, TMP1
    vaesenc 16*5(KS), TMP1, TMP1
    vaesenc 16*6(KS), TMP1, TMP1
    vaesenc 16*7(KS), TMP1, TMP1
    vaesenc 16*8(KS), TMP1, TMP1
    vaesenc 16*9(KS), TMP1, TMP1
    vmovdqu 16*10(KS), TMP2
    cmp     $10, NR
    je      .LLast3
    vaesenc 16*10(KS), TMP1, TMP1
    vaesenc 16*11(KS), TMP1, TMP1
    vmovdqu 16*12(KS), TMP2
    cmp     $12, NR
    je      .LLast3
    vaesenc 16*12(KS), TMP1, TMP1
    vaesenc 16*13(KS), TMP1, TMP1
    vmovdqu 16*14(KS), TMP2

.LLast3:
    vaesenclast TMP2, TMP1, TMP1

    vpxor   (PT), TMP1, TMP1
    vmovdqu TMP1, (CT)
    addq    $16, CT
    addq    $16, PT

    vpshufb .Lbswap_mask(%rip), TMP1, TMP1
    vpxor   TMP1, T, T
    vmovdqu (Htbl), TMP0
    call    GFMUL

    jmp .LDataSingles

#Here we encypt the final partial block, if there is one
.LDataTail:

    test    len, len
    jz      DATA_END
# First prepare the counter block
    vpshufb .Lbswap_mask(%rip), CTR, TMP1
    vpaddd  .Lone(%rip), CTR, CTR

    vpxor   (KS), TMP1, TMP1
    vaesenc 16*1(KS), TMP1, TMP1
    vaesenc 16*2(KS), TMP1, TMP1
    vaesenc 16*3(KS), TMP1, TMP1
    vaesenc 16*4(KS), TMP1, TMP1
    vaesenc 16*5(KS), TMP1, TMP1
    vaesenc 16*6(KS), TMP1, TMP1
    vaesenc 16*7(KS), TMP1, TMP1
    vaesenc 16*8(KS), TMP1, TMP1
    vaesenc 16*9(KS), TMP1, TMP1
    vmovdqu 16*10(KS), TMP2
    cmp     $10, NR
    je      .LLast4
    vaesenc 16*10(KS), TMP1, TMP1
    vaesenc 16*11(KS), TMP1, TMP1
    vmovdqu 16*12(KS), TMP2
    cmp     $12, NR
    je      .LLast4
    vaesenc 16*12(KS), TMP1, TMP1
    vaesenc 16*13(KS), TMP1, TMP1
    vmovdqu 16*14(KS), TMP2
  
.LLast4:
    vaesenclast TMP2, TMP1, TMP1
#Zero a temp location
    vpxor   TMP2, TMP2, TMP2
    vmovdqa TMP2, (%rsp)
    
# Copy the required bytes only (could probably use rep movsb)
    xor KS, KS  
.LEncCpy:
        cmp     KS, len
        je      .LEncCpyEnd
        movb    (PT, KS, 1), %r8b
        movb    %r8b, (%rsp, KS, 1)
        inc     KS
        jmp .LEncCpy
.LEncCpyEnd:
# Xor with the counter block
    vpxor   (%rsp), TMP1, TMP0
# Again, store at temp location
    vmovdqa TMP0, (%rsp)
# Copy only the required bytes to CT, and zero the rest for the hash
    xor KS, KS
.LEncCpy2:
    cmp     KS, len
    je      .LEncCpy3
    movb    (%rsp, KS, 1), %r8b
    movb    %r8b, (CT, KS, 1)
    inc     KS
    jmp .LEncCpy2
.LEncCpy3:
    cmp     $16, KS
    je      .LEndCpy3
    movb    $0, (%rsp, KS, 1)
    inc     KS
    jmp .LEncCpy3
.LEndCpy3:
   vmovdqa  (%rsp), TMP0

   vpshufb  .Lbswap_mask(%rip), TMP0, TMP0
   vpxor    TMP0, T, T
   vmovdqu  (Htbl), TMP0
   call     GFMUL

DATA_END:

   vpshufb  .Lbswap_mask(%rip), T, T
   vpshufb  .Lbswap_mask(%rip), CTR, CTR
   vmovdqu  T, 272(Gctx)
   vmovdqu  CTR, 288(Gctx)

   movq   %rbp, %rsp

   popq   %rbx
   popq   %rbp
   ret
   .size intel_aes_gcmENC, .-intel_aes_gcmENC
  
#########################
# Decrypt and Authenticate
# void intel_aes_gcmDEC(uint8_t* PT, uint8_t* CT, void *Gctx,uint64_t len);
.type intel_aes_gcmDEC,@function
.globl intel_aes_gcmDEC
.align 16
intel_aes_gcmDEC:
# parameter 1: CT    # input
# parameter 2: PT    # output
# parameter 3: %rdx  # Gctx
# parameter 4: %rcx  # len

.macro DEC_KARATSUBA i
    vmovdqu     (7-\i)*16(CT), TMP5
    vpshufb     .Lbswap_mask(%rip), TMP5, TMP5

    vpclmulqdq  $0x11, 16*\i(Htbl), TMP5, TMP3
    vpxor       TMP3, TMP1, TMP1
    vpclmulqdq  $0x00, 16*\i(Htbl), TMP5, TMP3
    vpxor       TMP3, TMP2, TMP2
    vpshufd     $78, TMP5, TMP3
    vpxor       TMP5, TMP3, TMP5
    vpclmulqdq  $0x00, 128+\i*16(Htbl), TMP5, TMP3
    vpxor       TMP3, TMP0, TMP0
.endm

.set PT,%rsi
.set CT,%rdi
.set Htbl, %rdx
.set len, %rcx
.set KS,%r9
.set NR,%r10d

.set Gctx, %rdx

.set T,%xmm0
.set TMP0,%xmm1
.set TMP1,%xmm2
.set TMP2,%xmm3
.set TMP3,%xmm4
.set TMP4,%xmm5
.set TMP5,%xmm6
.set CTR0,%xmm7
.set CTR1,%xmm8
.set CTR2,%xmm9
.set CTR3,%xmm10
.set CTR4,%xmm11
.set CTR5,%xmm12
.set CTR6,%xmm13
.set CTR7,%xmm14
.set CTR,%xmm15

    test  len, len
    jnz   .LbeginDec
    ret
   
.LbeginDec:

    pushq   %rbp
    pushq   %rbx
    movq    %rsp, %rbp   
    sub     $128, %rsp
    andq    $-16, %rsp
    vmovdqu 288(Gctx), CTR
    vmovdqu 272(Gctx), T
    mov     304(Gctx), KS
# AESContext->Nr
    mov     244(KS), NR

    vpshufb .Lbswap_mask(%rip), CTR, CTR
    vpshufb .Lbswap_mask(%rip), T, T
     
    vmovdqu .Lbswap_mask(%rip), TMP3
    jmp     .LDECOctets
      
# Decrypt 8 blocks each time while hashing them at the same time
.align 64
.LDECOctets:
   
        cmp $128, len
        jb  .LDECSingles
        sub $128, len

        vmovdqa CTR, CTR0
        vpaddd  .Lone(%rip), CTR0, CTR1
        vpaddd  .Ltwo(%rip), CTR0, CTR2
        vpaddd  .Lone(%rip), CTR2, CTR3
        vpaddd  .Ltwo(%rip), CTR2, CTR4
        vpaddd  .Lone(%rip), CTR4, CTR5
        vpaddd  .Ltwo(%rip), CTR4, CTR6
        vpaddd  .Lone(%rip), CTR6, CTR7
        vpaddd  .Ltwo(%rip), CTR6, CTR

        vpshufb TMP3, CTR0, CTR0
        vpshufb TMP3, CTR1, CTR1
        vpshufb TMP3, CTR2, CTR2
        vpshufb TMP3, CTR3, CTR3
        vpshufb TMP3, CTR4, CTR4
        vpshufb TMP3, CTR5, CTR5
        vpshufb TMP3, CTR6, CTR6
        vpshufb TMP3, CTR7, CTR7

        vmovdqu (KS), TMP3
        vpxor  TMP3, CTR0, CTR0
        vpxor  TMP3, CTR1, CTR1
        vpxor  TMP3, CTR2, CTR2
        vpxor  TMP3, CTR3, CTR3
        vpxor  TMP3, CTR4, CTR4
        vpxor  TMP3, CTR5, CTR5
        vpxor  TMP3, CTR6, CTR6
        vpxor  TMP3, CTR7, CTR7

        vmovdqu     7*16(CT), TMP5
        vpshufb     .Lbswap_mask(%rip), TMP5, TMP5
        vmovdqu     16*0(Htbl), TMP3
        vpclmulqdq  $0x11, TMP3, TMP5, TMP1
        vpclmulqdq  $0x00, TMP3, TMP5, TMP2      
        vpshufd     $78, TMP5, TMP3
        vpxor       TMP5, TMP3, TMP5
        vmovdqu     128+0*16(Htbl), TMP3      
        vpclmulqdq  $0x00, TMP3, TMP5, TMP0

        ROUND 1
        DEC_KARATSUBA 1

        ROUND 2
        DEC_KARATSUBA 2

        ROUND 3
        DEC_KARATSUBA 3

        ROUND 4
        DEC_KARATSUBA 4

        ROUND 5
        DEC_KARATSUBA 5

        ROUND 6
        DEC_KARATSUBA 6

        ROUND 7

        vmovdqu     0*16(CT), TMP5
        vpshufb     .Lbswap_mask(%rip), TMP5, TMP5
        vpxor       T, TMP5, TMP5
        vmovdqu     16*7(Htbl), TMP4
            
        vpclmulqdq  $0x11, TMP4, TMP5, TMP3
        vpxor       TMP3, TMP1, TMP1
        vpclmulqdq  $0x00, TMP4, TMP5, TMP3
        vpxor       TMP3, TMP2, TMP2

        vpshufd     $78, TMP5, TMP3
        vpxor       TMP5, TMP3, TMP5
        vmovdqu     128+7*16(Htbl), TMP4

        vpclmulqdq  $0x00, TMP4, TMP5, TMP3
        vpxor       TMP3, TMP0, TMP0

        ROUND 8      

        vpxor       TMP1, TMP0, TMP0
        vpxor       TMP2, TMP0, TMP0

        vpsrldq     $8, TMP0, TMP3
        vpxor       TMP3, TMP1, TMP4
        vpslldq     $8, TMP0, TMP3
        vpxor       TMP3, TMP2, T
        vmovdqa	  .Lpoly(%rip), TMP2

        vpalignr    $8, T, T, TMP1
        vpclmulqdq  $0x10, TMP2, T, T
        vpxor       T, TMP1, T

        ROUND 9

        vpalignr    $8, T, T, TMP1
        vpclmulqdq  $0x10, TMP2, T, T
        vpxor       T, TMP1, T

        vmovdqu     160(KS), TMP5
        cmp         $10, NR

        jbe  .LDECLast1

        ROUND 10
        ROUND 11

        vmovdqu     192(KS), TMP5
        cmp         $12, NR       

        jbe  .LDECLast1

        ROUND 12
        ROUND 13

        vmovdqu  224(KS), TMP5

.LDECLast1:      
      
        vpxor   (CT), TMP5, TMP3
        vaesenclast TMP3, CTR0, CTR0
        vpxor   16(CT), TMP5, TMP3
        vaesenclast TMP3, CTR1, CTR1
        vpxor   32(CT), TMP5, TMP3
        vaesenclast TMP3, CTR2, CTR2
        vpxor   48(CT), TMP5, TMP3
        vaesenclast TMP3, CTR3, CTR3
        vpxor   64(CT), TMP5, TMP3
        vaesenclast TMP3, CTR4, CTR4
        vpxor   80(CT), TMP5, TMP3
        vaesenclast TMP3, CTR5, CTR5
        vpxor   96(CT), TMP5, TMP3
        vaesenclast TMP3, CTR6, CTR6
        vpxor   112(CT), TMP5, TMP3
        vaesenclast TMP3, CTR7, CTR7

        vmovdqu .Lbswap_mask(%rip), TMP3

        vmovdqu CTR0, (PT)
        vmovdqu CTR1, 16(PT)
        vmovdqu CTR2, 32(PT)
        vmovdqu CTR3, 48(PT)
        vmovdqu CTR4, 64(PT)
        vmovdqu CTR5, 80(PT)
        vmovdqu CTR6, 96(PT)
        vmovdqu CTR7,112(PT)

        vpxor   TMP4, T, T

        lea 128(CT), CT
        lea 128(PT), PT
   jmp  .LDECOctets
   
#Here we decrypt and hash any remaining whole block
.LDECSingles:

    cmp   $16, len
    jb    .LDECTail
    sub   $16, len

    vmovdqu  (CT), TMP1
    vpshufb  .Lbswap_mask(%rip), TMP1, TMP1
    vpxor    TMP1, T, T
    vmovdqu  (Htbl), TMP0
    call     GFMUL


    vpshufb  .Lbswap_mask(%rip), CTR, TMP1
    vpaddd   .Lone(%rip), CTR, CTR

    vpxor    (KS), TMP1, TMP1
    vaesenc  16*1(KS), TMP1, TMP1
    vaesenc  16*2(KS), TMP1, TMP1
    vaesenc  16*3(KS), TMP1, TMP1
    vaesenc  16*4(KS), TMP1, TMP1
    vaesenc  16*5(KS), TMP1, TMP1
    vaesenc  16*6(KS), TMP1, TMP1
    vaesenc  16*7(KS), TMP1, TMP1
    vaesenc  16*8(KS), TMP1, TMP1
    vaesenc  16*9(KS), TMP1, TMP1
    vmovdqu  16*10(KS), TMP2
    cmp      $10, NR
    je       .LDECLast2
    vaesenc  16*10(KS), TMP1, TMP1
    vaesenc  16*11(KS), TMP1, TMP1
    vmovdqu  16*12(KS), TMP2
    cmp      $12, NR
    je       .LDECLast2
    vaesenc  16*12(KS), TMP1, TMP1
    vaesenc  16*13(KS), TMP1, TMP1
    vmovdqu  16*14(KS), TMP2
.LDECLast2:
    vaesenclast TMP2, TMP1, TMP1

    vpxor    (CT), TMP1, TMP1
    vmovdqu  TMP1, (PT)
    addq     $16, CT
    addq     $16, PT  
    jmp   .LDECSingles

#Here we decrypt the final partial block, if there is one
.LDECTail:
   test   len, len
   jz     .LDEC_END

   vpshufb  .Lbswap_mask(%rip), CTR, TMP1
   vpaddd .Lone(%rip), CTR, CTR

   vpxor  (KS), TMP1, TMP1
   vaesenc  16*1(KS), TMP1, TMP1
   vaesenc  16*2(KS), TMP1, TMP1
   vaesenc  16*3(KS), TMP1, TMP1
   vaesenc  16*4(KS), TMP1, TMP1
   vaesenc  16*5(KS), TMP1, TMP1
   vaesenc  16*6(KS), TMP1, TMP1
   vaesenc  16*7(KS), TMP1, TMP1
   vaesenc  16*8(KS), TMP1, TMP1
   vaesenc  16*9(KS), TMP1, TMP1
   vmovdqu  16*10(KS), TMP2
   cmp      $10, NR
   je       .LDECLast3
   vaesenc  16*10(KS), TMP1, TMP1
   vaesenc  16*11(KS), TMP1, TMP1
   vmovdqu  16*12(KS), TMP2
   cmp      $12, NR
   je       .LDECLast3
   vaesenc  16*12(KS), TMP1, TMP1
   vaesenc  16*13(KS), TMP1, TMP1
   vmovdqu  16*14(KS), TMP2

.LDECLast3:
   vaesenclast TMP2, TMP1, TMP1
  
   vpxor   TMP2, TMP2, TMP2
   vmovdqa TMP2, (%rsp) 
# Copy the required bytes only (could probably use rep movsb)
    xor KS, KS  
.LDecCpy:
        cmp     KS, len
        je      .LDecCpy2
        movb    (CT, KS, 1), %r8b
        movb    %r8b, (%rsp, KS, 1)
        inc     KS
        jmp     .LDecCpy
.LDecCpy2:
        cmp     $16, KS
        je      .LDecCpyEnd
        movb    $0, (%rsp, KS, 1)
        inc     KS
        jmp     .LDecCpy2
.LDecCpyEnd:
# Xor with the counter block
    vmovdqa (%rsp), TMP0
    vpxor   TMP0, TMP1, TMP1
# Again, store at temp location
    vmovdqa TMP1, (%rsp)
# Copy only the required bytes to PT, and zero the rest for the hash
    xor KS, KS
.LDecCpy3:
    cmp     KS, len
    je      .LDecCpyEnd3
    movb    (%rsp, KS, 1), %r8b
    movb    %r8b, (PT, KS, 1)
    inc     KS
    jmp     .LDecCpy3
.LDecCpyEnd3:
   vpshufb  .Lbswap_mask(%rip), TMP0, TMP0
   vpxor    TMP0, T, T
   vmovdqu  (Htbl), TMP0
   call     GFMUL
.LDEC_END:

   vpshufb  .Lbswap_mask(%rip), T, T
   vpshufb  .Lbswap_mask(%rip), CTR, CTR
   vmovdqu  T, 272(Gctx)
   vmovdqu  CTR, 288(Gctx)

   movq   %rbp, %rsp

   popq   %rbx
   popq   %rbp
   ret
  .size intel_aes_gcmDEC, .-intel_aes_gcmDEC
#########################
# a = T
# b = TMP0 - remains unchanged
# res = T
# uses also TMP1,TMP2,TMP3,TMP4
# __m128i GFMUL(__m128i A, __m128i B);
.type GFMUL,@function
.globl GFMUL
GFMUL:  
    vpclmulqdq  $0x00, TMP0, T, TMP1
    vpclmulqdq  $0x11, TMP0, T, TMP4

    vpshufd     $78, T, TMP2
    vpshufd     $78, TMP0, TMP3
    vpxor       T, TMP2, TMP2
    vpxor       TMP0, TMP3, TMP3

    vpclmulqdq  $0x00, TMP3, TMP2, TMP2
    vpxor       TMP1, TMP2, TMP2
    vpxor       TMP4, TMP2, TMP2

    vpslldq     $8, TMP2, TMP3
    vpsrldq     $8, TMP2, TMP2

    vpxor       TMP3, TMP1, TMP1
    vpxor       TMP2, TMP4, TMP4

    vpclmulqdq  $0x10, .Lpoly(%rip), TMP1, TMP2
    vpshufd     $78, TMP1, TMP3
    vpxor       TMP3, TMP2, TMP1

    vpclmulqdq  $0x10, .Lpoly(%rip), TMP1, TMP2
    vpshufd     $78, TMP1, TMP3
    vpxor       TMP3, TMP2, TMP1

    vpxor       TMP4, TMP1, T
    ret
.size GFMUL, .-GFMUL