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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-05-17 15:12:32 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-05-17 15:12:32 +0000
commit765b527dede2340754d01863cfef57072906a6a9 (patch)
treeecb88113ab93f149cf55d9f47d262318c5a30068 /changelog
parentAdding debian version 3.20240312.1. (diff)
downloadintel-microcode-765b527dede2340754d01863cfef57072906a6a9.tar.xz
intel-microcode-765b527dede2340754d01863cfef57072906a6a9.zip
Merging upstream version 3.20240514.1.
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'changelog')
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+2024-05-14:
+ * New upstream microcode datafile 20240514
+ - Mitigations for INTEL-SA-01051 (CVE-2023-45733)
+ Hardware logic contains race conditions in some Intel Processors may
+ allow an authenticated user to potentially enable partial information
+ disclosure via local access.
+ - Mitigations for INTEL-SA-01052 (CVE-2023-46103)
+ Sequence of processor instructions leads to unexpected behavior in
+ Intel Core Ultra Processors may allow an authenticated user to
+ potentially enable denial of service via local access.
+ - Mitigations for INTEL-SA-01036 (CVE-2023-45745, CVE-2023-47855)
+ Improper input validation in some Intel TDX module software before
+ version 1.5.05.46.698 may allow a privileged user to potentially enable
+ escalation of privilege via local access.
+ - Fix for unspecified functional issues on 4th gen and 5th gen Xeon
+ Scalable, 12th, 13th and 14th gen Intel Core processors, as well as for
+ Core i3 N-series processors.
+ * Updated microcodes:
+ sig 0x000806f8, pf_mask 0x87, 2024-02-05, rev 0x2b0005c0, size 581632
+ sig 0x000806f7, pf_mask 0x87, 2024-02-05, rev 0x2b0005c0
+ sig 0x000806f6, pf_mask 0x87, 2024-02-05, rev 0x2b0005c0
+ sig 0x000806f5, pf_mask 0x87, 2024-02-05, rev 0x2b0005c0
+ sig 0x000806f4, pf_mask 0x87, 2024-02-05, rev 0x2b0005c0
+ sig 0x000806f8, pf_mask 0x10, 2024-02-05, rev 0x2c000390, size 614400
+ sig 0x000806f6, pf_mask 0x10, 2024-02-05, rev 0x2c000390
+ sig 0x000806f5, pf_mask 0x10, 2024-02-05, rev 0x2c000390
+ sig 0x000806f4, pf_mask 0x10, 2024-02-05, rev 0x2c000390
+ sig 0x00090672, pf_mask 0x07, 2023-12-05, rev 0x0035, size 224256
+ sig 0x00090675, pf_mask 0x07, 2023-12-05, rev 0x0035
+ sig 0x000b06f2, pf_mask 0x07, 2023-12-05, rev 0x0035
+ sig 0x000b06f5, pf_mask 0x07, 2023-12-05, rev 0x0035
+ sig 0x000906a3, pf_mask 0x80, 2023-12-05, rev 0x0433, size 222208
+ sig 0x000906a4, pf_mask 0x80, 2023-12-05, rev 0x0433
+ sig 0x000906a4, pf_mask 0x40, 2023-12-07, rev 0x0007, size 119808
+ sig 0x000b0671, pf_mask 0x32, 2024-01-25, rev 0x0123, size 215040
+ sig 0x000b06e0, pf_mask 0x11, 2023-12-07, rev 0x0017, size 138240
+ sig 0x000c06f2, pf_mask 0x87, 2024-02-05, rev 0x21000230, size 552960
+ sig 0x000c06f1, pf_mask 0x87, 2024-02-05, rev 0x21000230
+
2024-03-12:
* New upstream microcode datafile 20240312
- Mitigations for INTEL-SA-INTEL-SA-00972 (CVE-2023-39368):