Adding upstream version 1:2.0.27.upstream/1%2.0.27upstream

Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>

2 files changed, 426 insertions, 0 deletions

diff --git a/purgatory/arch/i386/include/arch/debug.h b/purgatory/arch/i386/include/arch/debug.h
new file mode 100644
index 0000000..25853cd
--- /dev/null
+++ b/purgatory/arch/i386/include/arch/debug.h
@@ -0,0 +1,316 @@
+/* Base Address */
+#define TTYS0_BASE	0x3f8
+/* Data */
+#define TTYS0_RBR (TTYS0_BASE+0x00)
+#define TTYS0_TBR (TTYS0_BASE+0x00)
+/* Control */
+#define TTYS0_IER (TTYS0_BASE+0x01)
+#define TTYS0_IIR (TTYS0_BASE+0x02)
+#define TTYS0_FCR (TTYS0_BASE+0x02)
+#define TTYS0_LCR (TTYS0_BASE+0x03)
+#define TTYS0_MCR (TTYS0_BASE+0x04)
+
+#define TTYS0_DLL (TTYS0_BASE+0x00)
+#define TTYS0_DLM (TTYS0_BASE+0x01)
+/* Status */
+#define TTYS0_LSR (TTYS0_BASE+0x05)
+#define TTYS0_MSR (TTYS0_BASE+0x06)
+#define TTYS0_SCR (TTYS0_BASE+0x07)
+
+#define TTYS0_BAUD 9600
+#define TTYS0_DIV  (115200/TTYS0_BAUD)
+#define TTYS0_DIV_LO	(TTYS0_DIV&0xFF)
+#define TTYS0_DIV_HI	((TTYS0_DIV >> 8)&0xFF)
+
+#if ((115200%TTYS0_BAUD) != 0)
+#error Bad ttyS0 baud rate
+#endif
+
+#define TTYS0_INIT	\
+	/* disable interrupts */	\
+	movb	$0x00, %al		; \
+	movw	$TTYS0_IER, %dx		; \
+	outb	%al, %dx		; \
+					; \
+	/* enable fifos */		\
+	movb	$0x01, %al		; \
+	movw	$TTYS0_FCR, %dx		; \
+	outb	%al, %dx		; \
+					; \
+	/* Set Baud Rate Divisor to TTYS0_BAUD */	\
+	movw	$TTYS0_LCR, %dx		; \
+	movb	$0x83, %al		; \
+	outb	%al, %dx		; \
+					; \
+	movw	$TTYS0_DLL, %dx		; \
+	movb	$TTYS0_DIV_LO, %al	; \
+	outb	%al, %dx		; \
+					; \
+	movw	$TTYS0_DLM, %dx		; \
+	movb	$TTYS0_DIV_HI, %al	; \
+	outb	%al, %dx		; \
+					; \
+	movw	$TTYS0_LCR, %dx		; \
+	movb	$0x03, %al		; \
+	outb	%al, %dx
+	
+
+	/* uses:	ax, dx */
+#define TTYS0_TX_AL		\
+	mov	%al, %ah	; \
+9:	mov	$TTYS0_LSR, %dx	; \
+	inb	%dx, %al	; \
+	test	$0x20, %al	; \
+	je	9b		; \
+	mov	$TTYS0_TBR, %dx	; \
+	mov	%ah, %al	; \
+	outb	%al, %dx
+
+	/* uses:	ax, dx */
+#define TTYS0_TX_CHAR(byte)	\
+	mov	byte, %al	; \
+	TTYS0_TX_AL
+
+	/* uses:	eax, dx */
+#define TTYS0_TX_HEX32(lword)	\
+	mov	lword, %eax	; \
+	shr	$28, %eax	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %eax	; \
+	shr	$24, %eax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %eax	; \
+	shr	$20, %eax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %eax	; \
+	shr	$16, %eax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %eax	; \
+	shr	$12, %eax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %eax	; \
+	shr	$8, %eax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %eax	; \
+	shr	$4, %eax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %eax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL
+
+	/* uses:	rax, dx */
+#define TTYS0_TX_HEX64(lword)	\
+	mov	lword, %rax	; \
+	shr	$60, %rax	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$56, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$52, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$48, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$44, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$40, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$36, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$32, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$28, %rax	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$24, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$20, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$16, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$12, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$8, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	shr	$4, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL		; \
+				; \
+	mov	lword, %rax	; \
+	and	$0x0f, %al	; \
+	add	$'0', %al	; \
+	cmp	$'9', %al	; \
+	jle	9f		; \
+	add	$39, %al	; \
+9:				; \
+	TTYS0_TX_AL
+	
+
+#define DEBUG_CHAR(x) TTYS0_TX_CHAR($x) ;  TTYS0_TX_CHAR($'\r') ;  TTYS0_TX_CHAR($'\n')
+#define DEBUG_TX_HEX32(x) TTYS0_TX_HEX32(x); TTYS0_TX_CHAR($'\r') ;  TTYS0_TX_CHAR($'\n')
+#define DEBUG_TX_HEX64(x) TTYS0_TX_HEX64(x); TTYS0_TX_CHAR($'\r') ;  TTYS0_TX_CHAR($'\n')
diff --git a/purgatory/arch/i386/include/arch/io.h b/purgatory/arch/i386/include/arch/io.h
new file mode 100644
index 0000000..0a9430a
--- /dev/null
+++ b/purgatory/arch/i386/include/arch/io.h
@@ -0,0 +1,110 @@
+#ifndef ARCH_I386_IO_H
+#define ARCH_I386_IO_H
+
+#include <stdint.h>
+/* Helper functions for directly doing I/O */
+
+static inline __attribute__((__always_inline__))
+uint8_t inb(uint16_t port)
+{
+	uint8_t result;
+
+	__asm__ __volatile__ (
+		"inb %w1,%0"
+		:"=a" (result)
+		:"Nd" (port));
+	return result;
+}
+
+static inline __attribute__((__always_inline__))
+uint16_t inw(uint16_t port)
+{
+	uint16_t result;
+
+	__asm__ __volatile__ (
+		"inw %w1,%0"
+		:"=a" (result)
+		:"Nd" (port));
+	return result;
+}
+
+static inline __attribute__((__always_inline__))
+uint32_t inl(uint32_t port)
+{
+	uint32_t result;
+
+	__asm__ __volatile__ (
+		"inl %w1,%0"
+		:"=a" (result)
+		:"Nd" (port));
+	return result;
+}
+
+static inline __attribute__((__always_inline__))
+void outb (uint8_t value, uint16_t port)
+{
+	__asm__ __volatile__ (
+		"outb %b0,%w1"
+		:
+		:"a" (value), "Nd" (port));
+}
+
+static inline __attribute__((__always_inline__))
+void outw (uint16_t value, uint16_t port)
+{
+	__asm__ __volatile__ (
+		"outw %w0,%w1"
+		:
+		:"a" (value), "Nd" (port));
+}
+
+static inline __attribute__((__always_inline__))
+void outl (uint32_t value, uint16_t port)
+{
+	__asm__ __volatile__ (
+		"outl %0,%w1"
+		:
+		:"a" (value), "Nd" (port));
+}
+
+
+/*
+ * readX/writeX() are used to access memory mapped devices. On some
+ * architectures the memory mapped IO stuff needs to be accessed
+ * differently. On the x86 architecture, we just read/write the
+ * memory location directly.
+ */
+
+static inline __attribute__((__always_inline__))
+unsigned char readb(const volatile void  *addr)
+{
+	return *(volatile unsigned char *) addr;
+}
+static inline __attribute__((__always_inline__))
+unsigned short readw(const volatile void  *addr)
+{
+	return *(volatile unsigned short *) addr;
+}
+static inline __attribute__((__always_inline__))
+unsigned int readl(const volatile void  *addr)
+{
+	return *(volatile unsigned int *) addr;
+}
+
+static inline __attribute__((__always_inline__))
+void writeb(unsigned char b, volatile void  *addr)
+{
+	*(volatile unsigned char *) addr = b;
+}
+static inline __attribute__((__always_inline__))
+void writew(unsigned short b, volatile void  *addr)
+{
+	*(volatile unsigned short *) addr = b;
+}
+static inline __attribute__((__always_inline__))
+void writel(unsigned int b, volatile void  *addr)
+{
+	*(volatile unsigned int *) addr = b;
+}
+
+#endif /* ARCH_I386_IO_H */