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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-15 17:09:30 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-15 17:09:30 +0000 |
commit | 81749f1fe87e489c4e2e7408a0fae9370c3810b3 (patch) | |
tree | 2d1345a5762855b6577495d90ac134c4e92d7ff8 /tests/12-sim-basic_masked_ops.tests | |
parent | Initial commit. (diff) | |
download | libseccomp-81749f1fe87e489c4e2e7408a0fae9370c3810b3.tar.xz libseccomp-81749f1fe87e489c4e2e7408a0fae9370c3810b3.zip |
Adding upstream version 2.5.5.upstream/2.5.5upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'tests/12-sim-basic_masked_ops.tests')
-rw-r--r-- | tests/12-sim-basic_masked_ops.tests | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/tests/12-sim-basic_masked_ops.tests b/tests/12-sim-basic_masked_ops.tests new file mode 100644 index 0000000..5a722f8 --- /dev/null +++ b/tests/12-sim-basic_masked_ops.tests @@ -0,0 +1,48 @@ +# +# libseccomp regression test automation data +# +# Copyright IBM Corp. 2012 +# Author: Corey Bryant <coreyb@linux.vnet.ibm.com> +# + +test type: bpf-sim + +# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result +12-sim-basic_masked_ops all,-x32 1000 0 1 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x01 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x02-0x0A 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x101 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 11 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x0B 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x0C-0x6E 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x1000B 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 111 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x6F 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x70-0x100 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x102-0x200 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x10002-0x1000A 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x1000C-0x1006E 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x1006F 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 1000 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x3E8 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x2FF 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x300-0x3FF 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x400 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x402-0x4FF 2 N N N KILL +12-sim-basic_masked_ops all,-x32 1000 0 0x10300-0x103FF 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x00000000F00003E8 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x00000000800003E8 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x00000001800003E8 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x00000001000003E8 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0x0000000F000003E8 2 N N N ALLOW +12-sim-basic_masked_ops all,-x32 1000 0 0xFFFFFFFFFFFF03E8 2 N N N ALLOW + +test type: bpf-sim-fuzz + +# Testname StressCount +12-sim-basic_masked_ops 50 + +test type: bpf-valgrind + +# Testname +12-sim-basic_masked_ops |