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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-15 17:09:30 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-15 17:09:30 +0000 |
commit | 81749f1fe87e489c4e2e7408a0fae9370c3810b3 (patch) | |
tree | 2d1345a5762855b6577495d90ac134c4e92d7ff8 /tests/42-sim-adv_chains.tests | |
parent | Initial commit. (diff) | |
download | libseccomp-81749f1fe87e489c4e2e7408a0fae9370c3810b3.tar.xz libseccomp-81749f1fe87e489c4e2e7408a0fae9370c3810b3.zip |
Adding upstream version 2.5.5.upstream/2.5.5upstream
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'tests/42-sim-adv_chains.tests')
-rw-r--r-- | tests/42-sim-adv_chains.tests | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/tests/42-sim-adv_chains.tests b/tests/42-sim-adv_chains.tests new file mode 100644 index 0000000..600ad09 --- /dev/null +++ b/tests/42-sim-adv_chains.tests @@ -0,0 +1,54 @@ +# +# libseccomp regression test automation data +# +# Copyright (c) 2017 Red Hat <pmoore@redhat.com> +# Author: Paul Moore <paul@paul-moore.com> +# + +test type: bpf-sim + +# Testname Arch Syscall Arg0 Arg1 Arg2 Arg3 Arg4 Arg5 Result +42-sim-adv_chains all,-x32 1000 N N N N N N KILL +42-sim-adv_chains all,-x32 1001 N N N N N N ALLOW +42-sim-adv_chains all,-x32 1002 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1003 N N N N N N ALLOW +42-sim-adv_chains all,-x32 1003 1 N N N N N TRAP +42-sim-adv_chains all,-x32 1003 2 N N N N N ALLOW +42-sim-adv_chains all,-x32 1004 N N N N N N TRAP +42-sim-adv_chains all,-x32 1004 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1004 2 N N N N N TRAP +42-sim-adv_chains all,-x32 1005 N N N N N N ALLOW +42-sim-adv_chains all,-x32 1005 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1005 2 N N N N N ALLOW +42-sim-adv_chains all,-x32 1006 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1007 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1008 2 3 N N N N ALLOW +42-sim-adv_chains all,-x32 1008 2 3 3 N N N ALLOW +42-sim-adv_chains all,-x32 1008 2 3 4 N N N ALLOW +42-sim-adv_chains all,-x32 1009 N N N N N N ALLOW +42-sim-adv_chains all,-x32 1009 2 N N N N N ALLOW +42-sim-adv_chains all,-x32 1009 1 3 N N N N ALLOW +42-sim-adv_chains all,-x32 1010 N N N N N N KILL +42-sim-adv_chains all,-x32 1010 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1010 2 2 N N N N ALLOW +42-sim-adv_chains all,-x32 1011 1 N N N N N ALLOW +42-sim-adv_chains all,-x32 1011 2 4 1 N N N ALLOW +42-sim-adv_chains all,-x32 1012 8 N N N N N ALLOW +42-sim-adv_chains all,-x32 1013 2 3 N N N N ALLOW +42-sim-adv_chains all,-x32 1013 0 4 N N N N ALLOW +42-sim-adv_chains all,-x32 1014 0 0 2 3 N N ALLOW +42-sim-adv_chains all,-x32 1014 2 3 1 2 N N ALLOW +42-sim-adv_chains all,-x32 1015 1 N N N N N KILL +42-sim-adv_chains all,-x32 1015 4 N N N N N ALLOW +42-sim-adv_chains all,-x32 1015 4 1 N N N N ALLOW +42-sim-adv_chains all,-x32 1015 4 2 N N N N ALLOW + +test type: bpf-sim-fuzz + +# Testname StressCount +42-sim-adv_chains 50 + +test type: bpf-valgrind + +# Testname +42-sim-adv_chains |