summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/cm-regbits-34xx.h
diff options
context:
space:
mode:
authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-11 08:27:49 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-04-11 08:27:49 +0000
commitace9429bb58fd418f0c81d4c2835699bddf6bde6 (patch)
treeb2d64bc10158fdd5497876388cd68142ca374ed3 /arch/arm/mach-omap2/cm-regbits-34xx.h
parentInitial commit. (diff)
downloadlinux-ace9429bb58fd418f0c81d4c2835699bddf6bde6.tar.xz
linux-ace9429bb58fd418f0c81d4c2835699bddf6bde6.zip
Adding upstream version 6.6.15.upstream/6.6.15
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'arch/arm/mach-omap2/cm-regbits-34xx.h')
-rw-r--r--arch/arm/mach-omap2/cm-regbits-34xx.h52
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
new file mode 100644
index 0000000000..037529a9e9
--- /dev/null
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -0,0 +1,52 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+#ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_34XX_H
+#define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_34XX_H
+
+/*
+ * OMAP3430 Clock Management register bits
+ *
+ * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008 Nokia Corporation
+ *
+ * Written by Paul Walmsley
+ */
+
+#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK (1 << 0)
+#define OMAP3430_ST_IVA2_SHIFT 0
+#define OMAP3430_CLKTRCTRL_IVA2_MASK (0x3 << 0)
+#define OMAP3430_CLKACTIVITY_IVA2_MASK (1 << 0)
+#define OMAP3430_CLKTRCTRL_MPU_MASK (0x3 << 0)
+#define OMAP3430_ST_AES2_SHIFT 28
+#define OMAP3430_ST_SHA12_SHIFT 27
+#define AM35XX_ST_UART4_SHIFT 23
+#define OMAP3430_ST_HDQ_SHIFT 22
+#define OMAP3430ES2_ST_SSI_IDLE_SHIFT 8
+#define OMAP3430_ST_MAILBOXES_SHIFT 7
+#define OMAP3430_ST_SAD2D_SHIFT 3
+#define OMAP3430_ST_SDMA_SHIFT 2
+#define OMAP3430ES2_ST_USBTLL_SHIFT 2
+#define OMAP3430ES1_CLKTRCTRL_D2D_MASK (0x3 << 4)
+#define OMAP3430_CLKTRCTRL_L4_MASK (0x3 << 2)
+#define OMAP3430_CLKTRCTRL_L3_MASK (0x3 << 0)
+#define OMAP3430ES1_CLKTRCTRL_GFX_MASK (0x3 << 0)
+#define OMAP3430ES2_CLKTRCTRL_SGX_MASK (0x3 << 0)
+#define OMAP3430_ST_WDT2_SHIFT 5
+#define OMAP3430_ST_32KSYNC_SHIFT 2
+#define OMAP3430_AUTO_PERIPH_DPLL_MASK (0x7 << 3)
+#define OMAP3430ES2_ST_DSS_IDLE_SHIFT 1
+#define OMAP3430_CLKTRCTRL_DSS_MASK (0x3 << 0)
+#define OMAP3430_CLKTRCTRL_CAM_MASK (0x3 << 0)
+#define OMAP3430_ST_MCBSP4_SHIFT 2
+#define OMAP3430_ST_MCBSP3_SHIFT 1
+#define OMAP3430_ST_MCBSP2_SHIFT 0
+#define OMAP3430_CLKTRCTRL_PER_MASK (0x3 << 0)
+#define OMAP3430_CLKTRCTRL_EMU_MASK (0x3 << 0)
+#define OMAP3430_CLKTRCTRL_NEON_MASK (0x3 << 0)
+#define OMAP3430ES2_EN_USBHOST2_SHIFT 1
+#define OMAP3430ES2_ST_USBHOST_IDLE_SHIFT 1
+#define OMAP3430ES2_CLKTRCTRL_USBHOST_MASK (3 << 0)
+#define OMAP34XX_CLKSTCTRL_DISABLE_AUTO 0x0
+#define OMAP34XX_CLKSTCTRL_FORCE_SLEEP 0x1
+#define OMAP34XX_CLKSTCTRL_FORCE_WAKEUP 0x2
+#define OMAP34XX_CLKSTCTRL_ENABLE_AUTO 0x3
+#endif