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| author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-11 08:27:49 +0000 |
|---|---|---|
| committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-11 08:27:49 +0000 |
| commit | ace9429bb58fd418f0c81d4c2835699bddf6bde6 (patch) | |
| tree | b2d64bc10158fdd5497876388cd68142ca374ed3 /arch/arm/mach-omap2/cm-regbits-44xx.h | |
| parent | Initial commit. (diff) | |
| download | linux-ace9429bb58fd418f0c81d4c2835699bddf6bde6.tar.xz linux-ace9429bb58fd418f0c81d4c2835699bddf6bde6.zip | |
Adding upstream version 6.6.15.upstream/6.6.15
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'arch/arm/mach-omap2/cm-regbits-44xx.h')
| -rw-r--r-- | arch/arm/mach-omap2/cm-regbits-44xx.h | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/cm-regbits-44xx.h b/arch/arm/mach-omap2/cm-regbits-44xx.h new file mode 100644 index 0000000000..553a6267ed --- /dev/null +++ b/arch/arm/mach-omap2/cm-regbits-44xx.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * OMAP44xx Clock Management register bits + * + * Copyright (C) 2009-2012 Texas Instruments, Inc. + * Copyright (C) 2009-2010 Nokia Corporation + * + * Paul Walmsley (paul@pwsan.com) + * Rajendra Nayak (rnayak@ti.com) + * Benoit Cousson (b-cousson@ti.com) + * + * This file is automatically generated from the OMAP hardware databases. + * We respectfully ask that any modifications to this file be coordinated + * with the public linux-omap@vger.kernel.org mailing list and the + * authors above to ensure that the autogeneration scripts are kept + * up-to-date with the file contents. + */ + +#ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H +#define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H + +#define OMAP4430_ABE_STATDEP_SHIFT 3 +#define OMAP4430_CLKTRCTRL_SHIFT 0 +#define OMAP4430_CLKTRCTRL_MASK (0x3 << 0) +#define OMAP4430_DSS_STATDEP_SHIFT 8 +#define OMAP4430_DUCATI_STATDEP_SHIFT 0 +#define OMAP4430_GFX_STATDEP_SHIFT 10 +#define OMAP4430_IDLEST_SHIFT 16 +#define OMAP4430_IDLEST_MASK (0x3 << 16) +#define OMAP4430_IVAHD_STATDEP_SHIFT 2 +#define OMAP4430_L3INIT_STATDEP_SHIFT 7 +#define OMAP4430_L3_1_STATDEP_SHIFT 5 +#define OMAP4430_L3_2_STATDEP_SHIFT 6 +#define OMAP4430_L4CFG_STATDEP_SHIFT 12 +#define OMAP4430_L4PER_STATDEP_SHIFT 13 +#define OMAP4430_L4SEC_STATDEP_SHIFT 14 +#define OMAP4430_L4WKUP_STATDEP_SHIFT 15 +#define OMAP4430_MEMIF_STATDEP_SHIFT 4 +#define OMAP4430_MODULEMODE_SHIFT 0 +#define OMAP4430_MODULEMODE_MASK (0x3 << 0) +#define OMAP4430_TESLA_STATDEP_SHIFT 1 +#endif |