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| author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-08-07 13:11:22 +0000 |
|---|---|---|
| committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-08-07 13:11:22 +0000 |
| commit | b20732900e4636a467c0183a47f7396700f5f743 (patch) | |
| tree | 42f079ff82e701ebcb76829974b4caca3e5b6798 /drivers/clk/samsung/clk-exynos4.c | |
| parent | Adding upstream version 6.8.12. (diff) | |
| download | linux-b20732900e4636a467c0183a47f7396700f5f743.tar.xz linux-b20732900e4636a467c0183a47f7396700f5f743.zip | |
Adding upstream version 6.9.7.upstream/6.9.7
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'drivers/clk/samsung/clk-exynos4.c')
| -rw-r--r-- | drivers/clk/samsung/clk-exynos4.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 4ec41221e6..a026ccca73 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -1252,17 +1252,20 @@ static const struct exynos_cpuclk_cfg_data e4412_armclk_d[] __initconst = { static const struct samsung_cpu_clock exynos4210_cpu_clks[] __initconst = { CPU_CLK(CLK_ARM_CLK, "armclk", CLK_MOUT_APLL, CLK_SCLK_MPLL, - CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1, 0x14200, e4210_armclk_d), + CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1, 0x14000, + CPUCLK_LAYOUT_E4210, e4210_armclk_d), }; static const struct samsung_cpu_clock exynos4212_cpu_clks[] __initconst = { CPU_CLK(CLK_ARM_CLK, "armclk", CLK_MOUT_APLL, CLK_MOUT_MPLL_USER_C, - CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1, 0x14200, e4212_armclk_d), + CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1, 0x14000, + CPUCLK_LAYOUT_E4210, e4212_armclk_d), }; static const struct samsung_cpu_clock exynos4412_cpu_clks[] __initconst = { CPU_CLK(CLK_ARM_CLK, "armclk", CLK_MOUT_APLL, CLK_MOUT_MPLL_USER_C, - CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1, 0x14200, e4412_armclk_d), + CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1, 0x14000, + CPUCLK_LAYOUT_E4210, e4412_armclk_d), }; /* register exynos4 clocks */ |