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authorDaniel Baumann <daniel.baumann@progress-linux.org>2024-08-07 13:13:35 +0000
committerDaniel Baumann <daniel.baumann@progress-linux.org>2024-08-07 13:13:35 +0000
commit9ea788653ae1a5cea3f3853c5c50b58c98b3cd67 (patch)
treee1bf3b779c1dc9c5337c4442bf720073a3a53415 /drivers/iommu/amd/iommu.c
parentAdding upstream version 6.9.7. (diff)
downloadlinux-9ea788653ae1a5cea3f3853c5c50b58c98b3cd67.tar.xz
linux-9ea788653ae1a5cea3f3853c5c50b58c98b3cd67.zip
Adding upstream version 6.9.8.upstream/6.9.8
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'drivers/iommu/amd/iommu.c')
-rw-r--r--drivers/iommu/amd/iommu.c34
1 files changed, 22 insertions, 12 deletions
diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index fb727f5b0b..e2b900ffbc 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -2002,6 +2002,21 @@ static void clear_dte_entry(struct amd_iommu *iommu, u16 devid)
amd_iommu_apply_erratum_63(iommu, devid);
}
+/* Update and flush DTE for the given device */
+void amd_iommu_dev_update_dte(struct iommu_dev_data *dev_data, bool set)
+{
+ struct amd_iommu *iommu = get_amd_iommu_from_dev(dev_data->dev);
+
+ if (set)
+ set_dte_entry(iommu, dev_data);
+ else
+ clear_dte_entry(iommu, dev_data->devid);
+
+ clone_aliases(iommu, dev_data->dev);
+ device_flush_dte(dev_data);
+ iommu_completion_wait(iommu);
+}
+
static int do_attach(struct iommu_dev_data *dev_data,
struct protection_domain *domain)
{
@@ -2036,10 +2051,7 @@ static int do_attach(struct iommu_dev_data *dev_data,
}
/* Update device table */
- set_dte_entry(iommu, dev_data);
- clone_aliases(iommu, dev_data->dev);
-
- device_flush_dte(dev_data);
+ amd_iommu_dev_update_dte(dev_data, true);
return ret;
}
@@ -2049,6 +2061,12 @@ static void do_detach(struct iommu_dev_data *dev_data)
struct protection_domain *domain = dev_data->domain;
struct amd_iommu *iommu = get_amd_iommu_from_dev_data(dev_data);
+ /* Clear DTE and flush the entry */
+ amd_iommu_dev_update_dte(dev_data, false);
+
+ /* Flush IOTLB and wait for the flushes to finish */
+ amd_iommu_domain_flush_all(domain);
+
/* Clear GCR3 table */
if (domain->pd_mode == PD_MODE_V2) {
update_gcr3(dev_data, 0, 0, false);
@@ -2058,14 +2076,6 @@ static void do_detach(struct iommu_dev_data *dev_data)
/* Update data structures */
dev_data->domain = NULL;
list_del(&dev_data->list);
- clear_dte_entry(iommu, dev_data->devid);
- clone_aliases(iommu, dev_data->dev);
-
- /* Flush the DTE entry */
- device_flush_dte(dev_data);
-
- /* Flush IOTLB and wait for the flushes to finish */
- amd_iommu_domain_flush_all(domain);
/* decrease reference counters - needs to happen after the flushes */
domain->dev_iommu[iommu->index] -= 1;