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author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-05-18 18:50:03 +0000 |
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committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-05-18 18:50:03 +0000 |
commit | 01a69402cf9d38ff180345d55c2ee51c7e89fbc7 (patch) | |
tree | b406c5242a088c4f59c6e4b719b783f43aca6ae9 /drivers/pinctrl/qcom/pinctrl-msm.h | |
parent | Adding upstream version 6.7.12. (diff) | |
download | linux-d6208063787d081e93f32d9942baa7f9358b45f1.tar.xz linux-d6208063787d081e93f32d9942baa7f9358b45f1.zip |
Adding upstream version 6.8.9.upstream/6.8.9
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'drivers/pinctrl/qcom/pinctrl-msm.h')
-rw-r--r-- | drivers/pinctrl/qcom/pinctrl-msm.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.h b/drivers/pinctrl/qcom/pinctrl-msm.h index 4968d08a38..63852ed702 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.h +++ b/drivers/pinctrl/qcom/pinctrl-msm.h @@ -58,6 +58,9 @@ struct pinctrl_pin_desc; * @intr_enable_bit: Offset in @intr_cfg_reg for enabling the interrupt for this group. * @intr_status_bit: Offset in @intr_status_reg for reading and acking the interrupt * status. + * @intr_wakeup_present_bit: Offset in @intr_target_reg specifying the GPIO can generate + * wakeup events. + * @intr_wakeup_enable_bit: Offset in @intr_target_reg to enable wakeup events for the GPIO. * @intr_target_bit: Offset in @intr_target_reg for configuring the interrupt routing. * @intr_target_width: Number of bits used for specifying interrupt routing target. * @intr_target_kpss_val: Value in @intr_target_bit for specifying that the interrupt from @@ -100,6 +103,8 @@ struct msm_pingroup { unsigned intr_status_bit:5; unsigned intr_ack_high:1; + unsigned intr_wakeup_present_bit:5; + unsigned intr_wakeup_enable_bit:5; unsigned intr_target_bit:5; unsigned intr_target_width:5; unsigned intr_target_kpss_val:5; |