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| author | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-11 08:27:49 +0000 |
|---|---|---|
| committer | Daniel Baumann <daniel.baumann@progress-linux.org> | 2024-04-11 08:27:49 +0000 |
| commit | ace9429bb58fd418f0c81d4c2835699bddf6bde6 (patch) | |
| tree | b2d64bc10158fdd5497876388cd68142ca374ed3 /drivers/staging/rtl8712/rtl8712_edcasetting_bitdef.h | |
| parent | Initial commit. (diff) | |
| download | linux-ace9429bb58fd418f0c81d4c2835699bddf6bde6.tar.xz linux-ace9429bb58fd418f0c81d4c2835699bddf6bde6.zip | |
Adding upstream version 6.6.15.upstream/6.6.15
Signed-off-by: Daniel Baumann <daniel.baumann@progress-linux.org>
Diffstat (limited to 'drivers/staging/rtl8712/rtl8712_edcasetting_bitdef.h')
| -rw-r--r-- | drivers/staging/rtl8712/rtl8712_edcasetting_bitdef.h | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/drivers/staging/rtl8712/rtl8712_edcasetting_bitdef.h b/drivers/staging/rtl8712/rtl8712_edcasetting_bitdef.h new file mode 100644 index 0000000000..9048d6a652 --- /dev/null +++ b/drivers/staging/rtl8712/rtl8712_edcasetting_bitdef.h @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/****************************************************************************** + * + * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved. + * + * Modifications for inclusion into the Linux staging tree are + * Copyright(c) 2010 Larry Finger. All rights reserved. + * + * Contact information: + * WLAN FAE <wlanfae@realtek.com> + * Larry Finger <Larry.Finger@lwfinger.net> + * + ******************************************************************************/ +#ifndef __RTL8712_EDCASETTING_BITDEF_H__ +#define __RTL8712_EDCASETTING_BITDEF_H__ + +/*EDCAPARAM*/ +#define _TXOPLIMIT_MSK 0xFFFF0000 +#define _TXOPLIMIT_SHT 16 +#define _ECWIN_MSK 0x0000FF00 +#define _ECWIN_SHT 8 +#define _AIFS_MSK 0x000000FF +#define _AIFS_SHT 0 + +/*BCNTCFG*/ +#define _BCNECW_MSK 0xFF00 +#define _BCNECW_SHT 8 +#define _BCNIFS_MSK 0x00FF +#define _BCNIFS_SHT 0 + +/*CWRR*/ +#define _CWRR_MSK 0x03FF + +/*ACMAVG*/ +#define _AVG_TIME_UP BIT(3) +#define _AVGPERIOD_MSK 0x03 + +/*ACMHWCTRL*/ +#define _VOQ_ACM_STATUS BIT(6) +#define _VIQ_ACM_STATUS BIT(5) +#define _BEQ_ACM_STATUS BIT(4) +#define _VOQ_ACM_EN BIT(3) +#define _VIQ_ACM_EN BIT(2) +#define _BEQ_ACM_EN BIT(1) +#define _ACMHWEN BIT(0) + +/*VO_ADMTIME*/ +#define _VO_ACM_RUT BIT(18) +#define _VO_ADMTIME_MSK 0x0003FFF + +/*VI_ADMTIME*/ +#define _VI_ACM_RUT BIT(18) +#define _VI_ADMTIME_MSK 0x0003FFF + +/*BE_ADMTIME*/ +#define _BE_ACM_RUT BIT(18) +#define _BE_ADMTIME_MSK 0x0003FFF + +/*Retry limit reg*/ +#define _SRL_MSK 0xFF00 +#define _SRL_SHT 8 +#define _LRL_MSK 0x00FF +#define _LRL_SHT 0 + +#endif /* __RTL8712_EDCASETTING_BITDEF_H__*/ |