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Diffstat (limited to 'Documentation/devicetree/bindings/perf/spe-pmu.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/perf/spe-pmu.yaml | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/perf/spe-pmu.yaml b/Documentation/devicetree/bindings/perf/spe-pmu.yaml new file mode 100644 index 0000000000..7d74152f43 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/spe-pmu.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/spe-pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU) + +maintainers: + - Will Deacon <will@kernel.org> + +description: + ARMv8.2 introduces the optional Statistical Profiling Extension for collecting + performance sample data using an in-memory trace buffer. + +properties: + compatible: + const: arm,statistical-profiling-extension-v1 + + interrupts: + maxItems: 1 + description: | + The PPI to signal SPE events. For heterogeneous systems where SPE is only + supported on a subset of the CPUs, please consult the arm,gic-v3 binding + for details on describing a PPI partition. + +additionalProperties: false + +required: + - compatible + - interrupts + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + spe-pmu { + compatible = "arm,statistical-profiling-extension-v1"; + interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>; + }; |