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-rw-r--r--arch/arm/boot/dts/nspire/Makefile5
-rw-r--r--arch/arm/boot/dts/nspire/nspire-classic.dtsi86
-rw-r--r--arch/arm/boot/dts/nspire/nspire-clp.dts86
-rw-r--r--arch/arm/boot/dts/nspire/nspire-cx.dts170
-rw-r--r--arch/arm/boot/dts/nspire/nspire-tp.dts85
-rw-r--r--arch/arm/boot/dts/nspire/nspire.dtsi219
6 files changed, 651 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/nspire/Makefile b/arch/arm/boot/dts/nspire/Makefile
new file mode 100644
index 0000000000..82a2515bdd
--- /dev/null
+++ b/arch/arm/boot/dts/nspire/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_NSPIRE) += \
+ nspire-cx.dtb \
+ nspire-tp.dtb \
+ nspire-clp.dtb
diff --git a/arch/arm/boot/dts/nspire/nspire-classic.dtsi b/arch/arm/boot/dts/nspire/nspire-classic.dtsi
new file mode 100644
index 0000000000..a6e9cbf515
--- /dev/null
+++ b/arch/arm/boot/dts/nspire/nspire-classic.dtsi
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
+ */
+
+/include/ "nspire.dtsi"
+
+&lcd {
+ port {
+ clcd_pads: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+};
+
+&fast_timer {
+ /* compatible = "lsi,zevio-timer"; */
+ reg = <0x90010000 0x1000>, <0x900a0010 0x8>;
+};
+
+&uart {
+ compatible = "ns16550";
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&apb_pclk>;
+ no-loopback-test;
+};
+
+&timer0 {
+ /* compatible = "lsi,zevio-timer"; */
+ reg = <0x900c0000 0x1000>, <0x900a0018 0x8>;
+};
+
+&timer1 {
+ compatible = "lsi,zevio-timer";
+ reg = <0x900d0000 0x1000>, <0x900a0020 0x8>;
+};
+
+&keypad {
+ active-low;
+
+};
+
+&base_clk {
+ compatible = "lsi,nspire-classic-clock";
+};
+
+&ahb_clk {
+ compatible = "lsi,nspire-classic-ahb-divider";
+};
+
+
+&vbus_reg {
+ gpio = <&gpio 5 0>;
+};
+
+/ {
+ memory {
+ device_type = "memory";
+ reg = <0x10000000 0x2000000>; /* 32 MB */
+ };
+
+ ahb {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ intc: interrupt-controller@dc000000 {
+ compatible = "lsi,zevio-intc";
+ interrupt-controller;
+ reg = <0xdc000000 0x1000>;
+ #interrupt-cells = <1>;
+ };
+ };
+
+ panel {
+ compatible = "ti,nspire-classic-lcd-panel";
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&clcd_pads>;
+ };
+ };
+ };
+ chosen {
+ bootargs = "debug earlyprintk console=tty0 console=ttyS0,115200n8 root=/dev/ram0";
+ };
+};
diff --git a/arch/arm/boot/dts/nspire/nspire-clp.dts b/arch/arm/boot/dts/nspire/nspire-clp.dts
new file mode 100644
index 0000000000..c5773f770f
--- /dev/null
+++ b/arch/arm/boot/dts/nspire/nspire-clp.dts
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+
+/include/ "nspire-classic.dtsi"
+
+&keypad {
+ linux,keymap = <
+ MATRIX_KEY(0, 0, 0x1c)
+ MATRIX_KEY(0, 1, 0x1c)
+ MATRIX_KEY(0, 2, 0x39)
+ MATRIX_KEY(0, 4, 0x2c)
+ MATRIX_KEY(0, 5, 0x34)
+ MATRIX_KEY(0, 6, 0x15)
+ MATRIX_KEY(0, 7, 0x0b)
+ MATRIX_KEY(0, 8, 0x2d)
+ MATRIX_KEY(1, 0, 0x33)
+ MATRIX_KEY(1, 1, 0x4e)
+ MATRIX_KEY(1, 2, 0x11)
+ MATRIX_KEY(1, 3, 0x04)
+ MATRIX_KEY(1, 4, 0x2f)
+ MATRIX_KEY(1, 5, 0x03)
+ MATRIX_KEY(1, 6, 0x16)
+ MATRIX_KEY(1, 7, 0x02)
+ MATRIX_KEY(1, 8, 0x14)
+ MATRIX_KEY(2, 0, 0x62)
+ MATRIX_KEY(2, 1, 0x0c)
+ MATRIX_KEY(2, 2, 0x1f)
+ MATRIX_KEY(2, 3, 0x07)
+ MATRIX_KEY(2, 4, 0x13)
+ MATRIX_KEY(2, 5, 0x06)
+ MATRIX_KEY(2, 6, 0x10)
+ MATRIX_KEY(2, 7, 0x05)
+ MATRIX_KEY(2, 8, 0x19)
+ MATRIX_KEY(3, 0, 0x27)
+ MATRIX_KEY(3, 1, 0x37)
+ MATRIX_KEY(3, 2, 0x18)
+ MATRIX_KEY(3, 3, 0x0a)
+ MATRIX_KEY(3, 4, 0x31)
+ MATRIX_KEY(3, 5, 0x09)
+ MATRIX_KEY(3, 6, 0x32)
+ MATRIX_KEY(3, 7, 0x08)
+ MATRIX_KEY(3, 8, 0x26)
+ MATRIX_KEY(4, 0, 0x28)
+ MATRIX_KEY(4, 1, 0x35)
+ MATRIX_KEY(4, 2, 0x25)
+ MATRIX_KEY(4, 4, 0x24)
+ MATRIX_KEY(4, 6, 0x17)
+ MATRIX_KEY(4, 8, 0x23)
+ MATRIX_KEY(5, 0, 0x28)
+ MATRIX_KEY(5, 2, 0x22)
+ MATRIX_KEY(5, 3, 0x1b)
+ MATRIX_KEY(5, 4, 0x21)
+ MATRIX_KEY(5, 5, 0x1a)
+ MATRIX_KEY(5, 6, 0x12)
+ MATRIX_KEY(5, 7, 0x6f)
+ MATRIX_KEY(5, 8, 0x20)
+ MATRIX_KEY(5, 9, 0x2a)
+ MATRIX_KEY(6, 1, 0x1c)
+ MATRIX_KEY(6, 2, 0x2e)
+ MATRIX_KEY(6, 3, 0x68)
+ MATRIX_KEY(6, 4, 0x30)
+ MATRIX_KEY(6, 5, 0x6d)
+ MATRIX_KEY(6, 6, 0x1e)
+ MATRIX_KEY(6, 7, 0x01)
+ MATRIX_KEY(6, 8, 0x2b)
+ MATRIX_KEY(6, 9, 0x0f)
+ MATRIX_KEY(7, 0, 0x67)
+ MATRIX_KEY(7, 2, 0x6a)
+ MATRIX_KEY(7, 4, 0x6c)
+ MATRIX_KEY(7, 6, 0x69)
+ MATRIX_KEY(7, 7, 0x0e)
+ MATRIX_KEY(7, 8, 0x1d)
+ MATRIX_KEY(7, 10, 0x0d)
+ >;
+};
+
+/ {
+ model = "TI-NSPIRE Clickpad";
+ compatible = "ti,nspire-clp";
+};
diff --git a/arch/arm/boot/dts/nspire/nspire-cx.dts b/arch/arm/boot/dts/nspire/nspire-cx.dts
new file mode 100644
index 0000000000..29f0181e5b
--- /dev/null
+++ b/arch/arm/boot/dts/nspire/nspire-cx.dts
@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+
+/include/ "nspire.dtsi"
+
+&lcd {
+ port {
+ clcd_pads: endpoint {
+ remote-endpoint = <&panel_in>;
+ };
+ };
+};
+
+&fast_timer {
+ /* compatible = "arm,sp804", "arm,primecell"; */
+};
+
+&uart {
+ compatible = "arm,pl011", "arm,primecell";
+
+ clocks = <&uart_clk>, <&apb_pclk>;
+ clock-names = "uartclk", "apb_pclk";
+};
+
+&timer0 {
+ compatible = "arm,sp804", "arm,primecell";
+};
+
+&timer1 {
+ compatible = "arm,sp804", "arm,primecell";
+};
+
+&base_clk {
+ compatible = "lsi,nspire-cx-clock";
+};
+
+&ahb_clk {
+ compatible = "lsi,nspire-cx-ahb-divider";
+};
+
+&keypad {
+ linux,keymap = <
+ MATRIX_KEY(0, 0, 0x1c)
+ MATRIX_KEY(0, 1, 0x1c)
+ MATRIX_KEY(0, 4, 0x39)
+ MATRIX_KEY(0, 5, 0x2c)
+ MATRIX_KEY(0, 6, 0x15)
+ MATRIX_KEY(0, 7, 0x0b)
+ MATRIX_KEY(0, 8, 0x0f)
+ MATRIX_KEY(1, 0, 0x2d)
+ MATRIX_KEY(1, 1, 0x11)
+ MATRIX_KEY(1, 2, 0x2f)
+ MATRIX_KEY(1, 3, 0x04)
+ MATRIX_KEY(1, 4, 0x16)
+ MATRIX_KEY(1, 5, 0x14)
+ MATRIX_KEY(1, 6, 0x1f)
+ MATRIX_KEY(1, 7, 0x02)
+ MATRIX_KEY(1, 10, 0x6a)
+ MATRIX_KEY(2, 0, 0x13)
+ MATRIX_KEY(2, 1, 0x10)
+ MATRIX_KEY(2, 2, 0x19)
+ MATRIX_KEY(2, 3, 0x07)
+ MATRIX_KEY(2, 4, 0x18)
+ MATRIX_KEY(2, 5, 0x31)
+ MATRIX_KEY(2, 6, 0x32)
+ MATRIX_KEY(2, 7, 0x05)
+ MATRIX_KEY(2, 8, 0x28)
+ MATRIX_KEY(2, 9, 0x6c)
+ MATRIX_KEY(3, 0, 0x26)
+ MATRIX_KEY(3, 1, 0x25)
+ MATRIX_KEY(3, 2, 0x24)
+ MATRIX_KEY(3, 3, 0x0a)
+ MATRIX_KEY(3, 4, 0x17)
+ MATRIX_KEY(3, 5, 0x23)
+ MATRIX_KEY(3, 6, 0x22)
+ MATRIX_KEY(3, 7, 0x08)
+ MATRIX_KEY(3, 8, 0x35)
+ MATRIX_KEY(3, 9, 0x69)
+ MATRIX_KEY(4, 0, 0x21)
+ MATRIX_KEY(4, 1, 0x12)
+ MATRIX_KEY(4, 2, 0x20)
+ MATRIX_KEY(4, 4, 0x2e)
+ MATRIX_KEY(4, 5, 0x30)
+ MATRIX_KEY(4, 6, 0x1e)
+ MATRIX_KEY(4, 7, 0x0d)
+ MATRIX_KEY(4, 8, 0x37)
+ MATRIX_KEY(4, 9, 0x67)
+ MATRIX_KEY(5, 1, 0x38)
+ MATRIX_KEY(5, 2, 0x0c)
+ MATRIX_KEY(5, 3, 0x1b)
+ MATRIX_KEY(5, 4, 0x34)
+ MATRIX_KEY(5, 5, 0x1a)
+ MATRIX_KEY(5, 6, 0x06)
+ MATRIX_KEY(5, 8, 0x27)
+ MATRIX_KEY(5, 9, 0x0e)
+ MATRIX_KEY(5, 10, 0x6f)
+ MATRIX_KEY(6, 0, 0x2b)
+ MATRIX_KEY(6, 2, 0x4e)
+ MATRIX_KEY(6, 3, 0x68)
+ MATRIX_KEY(6, 4, 0x03)
+ MATRIX_KEY(6, 5, 0x6d)
+ MATRIX_KEY(6, 6, 0x09)
+ MATRIX_KEY(6, 7, 0x01)
+ MATRIX_KEY(6, 9, 0x0f)
+ MATRIX_KEY(7, 8, 0x2a)
+ MATRIX_KEY(7, 9, 0x1d)
+ MATRIX_KEY(7, 10, 0x33)
+ >;
+};
+
+&vbus_reg {
+ gpio = <&gpio 2 0>;
+};
+
+/ {
+ model = "TI-NSPIRE CX";
+ compatible = "ti,nspire-cx";
+
+ memory {
+ device_type = "memory";
+ reg = <0x10000000 0x4000000>; /* 64 MB */
+ };
+
+ uart_clk: uart_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <12000000>;
+ };
+
+ ahb {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ intc: interrupt-controller@dc000000 {
+ compatible = "arm,pl190-vic";
+ interrupt-controller;
+ reg = <0xdc000000 0x1000>;
+ #interrupt-cells = <1>;
+ };
+
+ apb@90000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ i2c@90050000 {
+ compatible = "snps,designware-i2c";
+ reg = <0x90050000 0x1000>;
+ interrupts = <20>;
+ };
+ };
+ };
+
+ panel {
+ compatible = "ti,nspire-cx-lcd-panel";
+ port {
+ panel_in: endpoint {
+ remote-endpoint = <&clcd_pads>;
+ };
+ };
+ };
+ chosen {
+ bootargs = "debug earlyprintk console=tty0 console=ttyAMA0,115200n8 root=/dev/ram0";
+ };
+};
diff --git a/arch/arm/boot/dts/nspire/nspire-tp.dts b/arch/arm/boot/dts/nspire/nspire-tp.dts
new file mode 100644
index 0000000000..3f0107f1c2
--- /dev/null
+++ b/arch/arm/boot/dts/nspire/nspire-tp.dts
@@ -0,0 +1,85 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/input/input.h>
+
+/include/ "nspire-classic.dtsi"
+
+&keypad {
+ linux,keymap = <
+ MATRIX_KEY(0, 0, 0x1c)
+ MATRIX_KEY(0, 1, 0x1c)
+ MATRIX_KEY(0, 4, 0x39)
+ MATRIX_KEY(0, 5, 0x2c)
+ MATRIX_KEY(0, 6, 0x15)
+ MATRIX_KEY(0, 7, 0x0b)
+ MATRIX_KEY(0, 8, 0x0f)
+ MATRIX_KEY(1, 0, 0x2d)
+ MATRIX_KEY(1, 1, 0x11)
+ MATRIX_KEY(1, 2, 0x2f)
+ MATRIX_KEY(1, 3, 0x04)
+ MATRIX_KEY(1, 4, 0x16)
+ MATRIX_KEY(1, 5, 0x14)
+ MATRIX_KEY(1, 6, 0x1f)
+ MATRIX_KEY(1, 7, 0x02)
+ MATRIX_KEY(1, 10, 0x6a)
+ MATRIX_KEY(2, 0, 0x13)
+ MATRIX_KEY(2, 1, 0x10)
+ MATRIX_KEY(2, 2, 0x19)
+ MATRIX_KEY(2, 3, 0x07)
+ MATRIX_KEY(2, 4, 0x18)
+ MATRIX_KEY(2, 5, 0x31)
+ MATRIX_KEY(2, 6, 0x32)
+ MATRIX_KEY(2, 7, 0x05)
+ MATRIX_KEY(2, 8, 0x28)
+ MATRIX_KEY(2, 9, 0x6c)
+ MATRIX_KEY(3, 0, 0x26)
+ MATRIX_KEY(3, 1, 0x25)
+ MATRIX_KEY(3, 2, 0x24)
+ MATRIX_KEY(3, 3, 0x0a)
+ MATRIX_KEY(3, 4, 0x17)
+ MATRIX_KEY(3, 5, 0x23)
+ MATRIX_KEY(3, 6, 0x22)
+ MATRIX_KEY(3, 7, 0x08)
+ MATRIX_KEY(3, 8, 0x35)
+ MATRIX_KEY(3, 9, 0x69)
+ MATRIX_KEY(4, 0, 0x21)
+ MATRIX_KEY(4, 1, 0x12)
+ MATRIX_KEY(4, 2, 0x20)
+ MATRIX_KEY(4, 4, 0x2e)
+ MATRIX_KEY(4, 5, 0x30)
+ MATRIX_KEY(4, 6, 0x1e)
+ MATRIX_KEY(4, 7, 0x0d)
+ MATRIX_KEY(4, 8, 0x37)
+ MATRIX_KEY(4, 9, 0x67)
+ MATRIX_KEY(5, 1, 0x38)
+ MATRIX_KEY(5, 2, 0x0c)
+ MATRIX_KEY(5, 3, 0x1b)
+ MATRIX_KEY(5, 4, 0x34)
+ MATRIX_KEY(5, 5, 0x1a)
+ MATRIX_KEY(5, 6, 0x06)
+ MATRIX_KEY(5, 8, 0x27)
+ MATRIX_KEY(5, 9, 0x0e)
+ MATRIX_KEY(5, 10, 0x6f)
+ MATRIX_KEY(6, 0, 0x2b)
+ MATRIX_KEY(6, 2, 0x4e)
+ MATRIX_KEY(6, 3, 0x68)
+ MATRIX_KEY(6, 4, 0x03)
+ MATRIX_KEY(6, 5, 0x6d)
+ MATRIX_KEY(6, 6, 0x09)
+ MATRIX_KEY(6, 7, 0x01)
+ MATRIX_KEY(6, 9, 0x0f)
+ MATRIX_KEY(7, 8, 0x2a)
+ MATRIX_KEY(7, 9, 0x1d)
+ MATRIX_KEY(7, 10, 0x33)
+ >;
+};
+
+/ {
+ model = "TI-NSPIRE Touchpad";
+ compatible = "ti,nspire-tp";
+};
diff --git a/arch/arm/boot/dts/nspire/nspire.dtsi b/arch/arm/boot/dts/nspire/nspire.dtsi
new file mode 100644
index 0000000000..d56fef7250
--- /dev/null
+++ b/arch/arm/boot/dts/nspire/nspire.dtsi
@@ -0,0 +1,219 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&intc>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "arm,arm926ej-s";
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+
+ bootrom: bootrom@0 {
+ reg = <0x00000000 0x80000>;
+ };
+
+ sram: sram@a4000000 {
+ compatible = "mmio-sram";
+ reg = <0xa4000000 0x20000>; /* 128k */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xa4000000 0x20000>;
+
+ sram@0 {
+ reg = <0x0 0x20000>;
+ };
+ };
+
+ timer_clk: timer_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ };
+
+ base_clk: base_clk {
+ #clock-cells = <0>;
+ reg = <0x900b0024 0x4>;
+ };
+
+ ahb_clk: ahb_clk {
+ #clock-cells = <0>;
+ reg = <0x900b0024 0x4>;
+ clocks = <&base_clk>;
+ };
+
+ apb_pclk: apb_pclk {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clock-div = <2>;
+ clock-mult = <1>;
+ clocks = <&ahb_clk>;
+ };
+
+ usb_phy: usb_phy {
+ compatible = "usb-nop-xceiv";
+ #phy-cells = <0>;
+ };
+
+ vbus_reg: vbus_reg {
+ compatible = "regulator-fixed";
+
+ regulator-name = "USB VBUS output";
+
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ spi: spi@a9000000 {
+ reg = <0xa9000000 0x1000>;
+ };
+
+ usb0: usb@b0000000 {
+ compatible = "lsi,zevio-usb";
+ reg = <0xb0000000 0x1000>;
+ interrupts = <8>;
+
+ usb-phy = <&usb_phy>;
+ vbus-supply = <&vbus_reg>;
+ };
+
+ usb1: usb@b4000000 {
+ reg = <0xb4000000 0x1000>;
+ interrupts = <9>;
+ status = "disabled";
+ };
+
+ lcd: lcd@c0000000 {
+ compatible = "arm,pl111", "arm,primecell";
+ reg = <0xc0000000 0x1000>;
+ interrupts = <21>;
+
+ /*
+ * We assume the same clock is fed to APB and CLCDCLK.
+ * There is some code to scale the clock down by a factor
+ * 48 for the display so likely the frequency to the
+ * display is 1MHz and the CLCDCLK is 48 MHz.
+ */
+ clocks = <&apb_pclk>, <&apb_pclk>;
+ clock-names = "clcdclk", "apb_pclk";
+ };
+
+ adc: adc@c4000000 {
+ reg = <0xc4000000 0x1000>;
+ interrupts = <11>;
+ };
+
+ tdes: crypto@c8010000 {
+ reg = <0xc8010000 0x1000>;
+ };
+
+ sha256: crypto@cc000000 {
+ reg = <0xcc000000 0x1000>;
+ };
+
+ apb@90000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clock-ranges;
+ ranges;
+
+ gpio: gpio@90000000 {
+ compatible = "lsi,zevio-gpio";
+ reg = <0x90000000 0x1000>;
+ interrupts = <7>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ fast_timer: timer@90010000 {
+ reg = <0x90010000 0x1000>;
+ interrupts = <17>;
+ };
+
+ uart: serial@90020000 {
+ reg = <0x90020000 0x1000>;
+ interrupts = <1>;
+ };
+
+ timer0: timer@900c0000 {
+ reg = <0x900c0000 0x1000>;
+ clocks = <&timer_clk>, <&timer_clk>,
+ <&timer_clk>;
+ clock-names = "timer0clk", "timer1clk",
+ "apb_pclk";
+ };
+
+ timer1: timer@900d0000 {
+ reg = <0x900d0000 0x1000>;
+ interrupts = <19>;
+ clocks = <&timer_clk>, <&timer_clk>,
+ <&timer_clk>;
+ clock-names = "timer0clk", "timer1clk",
+ "apb_pclk";
+ };
+
+ watchdog: watchdog@90060000 {
+ compatible = "arm,primecell";
+ reg = <0x90060000 0x1000>;
+ interrupts = <3>;
+ };
+
+ rtc: rtc@90090000 {
+ reg = <0x90090000 0x1000>;
+ interrupts = <4>;
+ };
+
+ misc: misc@900a0000 {
+ compatible = "ti,nspire-misc", "syscon", "simple-mfd";
+ reg = <0x900a0000 0x1000>;
+
+ reboot {
+ compatible = "syscon-reboot";
+ offset = <0x08>;
+ value = <0x02>;
+ };
+ };
+
+ pwr: pwr@900b0000 {
+ reg = <0x900b0000 0x1000>;
+ interrupts = <15>;
+ };
+
+ keypad: input@900e0000 {
+ compatible = "ti,nspire-keypad";
+ reg = <0x900e0000 0x1000>;
+ interrupts = <16>;
+
+ scan-interval = <1000>;
+ row-delay = <200>;
+
+ clocks = <&apb_pclk>;
+ };
+
+ contrast: contrast@900f0000 {
+ reg = <0x900f0000 0x1000>;
+ };
+
+ led: led@90110000 {
+ reg = <0x90110000 0x1000>;
+ };
+ };
+ };
+};
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-03 07:28:27 +0000