diff options
Diffstat (limited to 'arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi')
-rw-r--r-- | arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi | 75 |
1 files changed, 75 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi new file mode 100644 index 0000000000..7ef635997e --- /dev/null +++ b/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1.dtsi @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (c) 2018, The Linux Foundation. All rights reserved. + +#include "qcom-ipq4019.dtsi" +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512MB */ + }; + + aliases { + serial0 = &blsp1_uart1; + serial1 = &blsp1_uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + soc { + pinctrl@1000000 { + serial_0_pins: serial0-pinmux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + + i2c_0_pins: i2c-0-pinmux { + pins = "gpio20", "gpio21"; + function = "blsp_i2c0"; + bias-disable; + }; + + nand_pins: nand-pins { + pins = "gpio53", "gpio55", "gpio56", + "gpio57", "gpio58", "gpio59", + "gpio60", "gpio62", "gpio63", + "gpio64", "gpio65", "gpio66", + "gpio67", "gpio68", "gpio69"; + function = "qpic"; + }; + }; + + serial@78af000 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + dma-controller@7884000 { + status = "okay"; + }; + + i2c@78b7000 { /* BLSP1 QUP2 */ + pinctrl-0 = <&i2c_0_pins>; + pinctrl-names = "default"; + status = "okay"; + }; + + dma-controller@7984000 { + status = "okay"; + }; + }; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; +}; |