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-rw-r--r--arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts294
1 files changed, 87 insertions, 207 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts
index d9fa0deea7..33f8d7d197 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-bl-osm-s.dts
@@ -25,23 +25,21 @@
leds {
compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio_led>;
led1 {
label = "led1";
- gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
led2 {
label = "led2";
- gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
};
led3 {
label = "led3";
- gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+ gpios = <&gpio3 7 GPIO_ACTIVE_LOW>;
};
};
@@ -52,24 +50,12 @@
reg_rst_eth2: regulator-rst-eth2 {
compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb_eth2>;
- gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
+ gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
regulator-name = "rst-usb-eth2";
};
- reg_usb1_vbus: regulator-usb1-vbus {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_reg_usb1_vbus>;
- gpio = <&gpio3 25 GPIO_ACTIVE_LOW>;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-name = "usb1-vbus";
- };
-
reg_vdd_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-always-on;
@@ -80,9 +66,6 @@
};
&ecspi2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi2>;
- cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
status = "okay";
can@0 {
@@ -91,7 +74,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can>;
clocks = <&osc_can>;
- interrupts-extended = <&gpio4 28 IRQ_TYPE_LEVEL_LOW>;
+ interrupts-extended = <&gpio5 1 IRQ_TYPE_LEVEL_LOW>;
/*
* Limit the SPI clock to 15 MHz to prevent issues
* with corrupted data due to chip errata.
@@ -103,9 +86,6 @@
};
&ecspi3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi3>;
- cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
status = "okay";
eeram@0 {
@@ -117,8 +97,8 @@
&fec1 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet>;
- phy-connection-type = "rgmii-rxid";
+ pinctrl-0 = <&pinctrl_enet_rgmii>;
+ phy-connection-type = "rgmii-id";
phy-handle = <&ethphy>;
status = "okay";
@@ -127,55 +107,101 @@
#size-cells = <0>;
ethphy: ethernet-phy@0 {
+ compatible = "ethernet-phy-id4f51.e91b";
reg = <0>;
- reset-assert-us = <1>;
- reset-deassert-us = <15000>;
- reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
};
};
};
+/*
+ * Rename SoM signals according to board usage:
+ * GPIO_B_0 -> DIO1_OUT
+ * GPIO_B_1 -> DIO2_OUT
+ */
&gpio1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio1>;
- gpio-line-names = "", "", "", "dio1-out", "", "", "dio1-in", "dio2-out",
- "dio2-in", "dio3-out", "dio3-in", "dio4-out", "", "", "", "",
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "";
+ gpio-line-names = "", "GPIO_A_0", "", "GPIO_A_1",
+ "", "GPIO_A_2", "GPIO_A_3", "GPIO_A_4",
+ "GPIO_A_5", "GPIO_A_6", "GPIO_A_7", "DIO1_OUT",
+ "DIO2_OUT", "USB_A_OC#", "CAM_MCK", "USB_B_OC#",
+ "ETH_MDC", "ETH_MDIO", "ETH_A_(S)(R)(G)MII_TXD3",
+ "ETH_A_(S)(R)(G)MII_TXD2", "ETH_A_(S)(R)(G)MII_TXD1",
+ "ETH_A_(S)(R)(G)MII_TXD0", "ETH_A_(R)(G)MII_TX_EN(_ER)",
+ "ETH_A_(R)(G)MII_TX_CLK", "ETH_A_(R)(G)MII_RX_DV(_ER)",
+ "ETH_A_(R)(G)MII_RX_CLK", "ETH_A_(S)(R)(G)MII_RXD0",
+ "ETH_A_(S)(R)(G)MII_RXD1", "ETH_A_(R)(G)MII_RXD2",
+ "ETH_A_(R)(G)MII_RXD3";
};
-&gpio5 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpio5>;
- gpio-line-names = "", "", "dio4-in", "", "", "", "", "",
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "";
+/*
+ * Rename SoM signals according to board usage:
+ * GPIO_B_2 -> DIO3_OUT
+ * GPIO_B_3 -> DIO4_OUT
+ */
+&gpio3 {
+ gpio-line-names = "GPIO_C_5", "GPIO_C_4", "SDIO_B_CD#", "SDIO_B_D5",
+ "SDIO_B_D6", "SDIO_B_D7", "GPIO_C_0", "GPIO_C_1",
+ "GPIO_C_2", "GPIO_C_3", "SDIO_B_D0", "SDIO_B_D1",
+ "SDIO_B_D2", "SDIO_B_D3", "", "SDIO_B_D4",
+ "CARRIER_PWR_EN", "SDIO_B_CLK", "SDIO_B_CMD", "DIO3_OUT",
+ "USB_B_EN", "DIO4_OUT", "PCIe_CLKREQ#", "PCIe_A_PERST#",
+ "PCIe_WAKE#", "USB_A_EN";
};
-&i2c4 {
- clock-frequency = <100000>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c4>;
+/*
+ * Rename SoM signals according to board usage:
+ * GPIO_B_4 -> DIO1_IN
+ * GPIO_B_5 -> DIO2_IN
+ * GPIO_B_6 -> DIO3_IN
+ * GPIO_B_7 -> DIO4_IN
+ */
+&gpio4 {
+ gpio-line-names = "GPIO_C_7", "", "I2S_A_DATA_IN", "I2S_B_DATA_IN",
+ "DIO1_IN", "BOOT_SEL0#", "BOOT_SEL1#", "",
+ "", "", "I2S_LRCLK", "I2S_BITCLK",
+ "I2S_A_DATA_OUT", "I2S_B_DATA_OUT", "DIO2_IN", "DIO3_IN",
+ "DIO4_IN", "SPI_A_/WP_(IO2)", "SPI_A_/HOLD_(IO3)", "GPIO_C_6",
+ "I2S_MCLK", "UART_A_TX", "UART_A_RX", "UART_A_CTS",
+ "UART_A_RTS", "", "", "",
+ "PCIe_SM_ALERT", "UART_B_RTS", "UART_B_CTS", "UART_B_RX";
+};
+
+&i2c3 {
status = "okay";
+
+ usb-hub@2c {
+ compatible = "microchip,usb2514b";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_hub>;
+ reg = <0x2c>;
+ non-removable-ports = <0>, <3>;
+ reset-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
+ };
};
&pwm2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm2>;
status = "okay";
};
+&reg_usb2_vbus {
+ status = "disabled";
+};
+
+&reg_usdhc2_vcc {
+ status = "disabled";
+};
+
+&reg_usdhc3_vcc {
+ status = "disabled";
+};
+
&uart1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
uart-has-rtscts;
status = "okay";
};
&uart2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
linux,rs485-enabled-at-boot-time;
uart-has-rtscts;
status = "okay";
@@ -183,8 +209,6 @@
&usbotg1 {
dr_mode = "otg";
- disable-over-current;
- vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};
@@ -195,14 +219,17 @@
#size-cells = <0>;
status = "okay";
+ /* VBUS is controlled by the hub */
+ /delete-property/ vbus-supply;
+
usb1@1 {
- compatible = "usb424,9514";
+ compatible = "usb424,2514";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
usbnet: ethernet@1 {
- compatible = "usb424,ec00";
+ compatible = "usbb95,772b";
reg = <1>;
local-mac-address = [ 00 00 00 00 00 00 ];
};
@@ -210,167 +237,20 @@
};
&usdhc2 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_usdhc2>;
- pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
vmmc-supply = <&reg_vdd_3v3>;
- vqmmc-supply = <&reg_nvcc_sd>;
- cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
status = "okay";
};
&iomuxc {
pinctrl_can: cangrp {
fsl,pins = <
- MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19
- >;
- };
-
- pinctrl_ecspi2: ecspi2grp {
- fsl,pins = <
- MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
- MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
- MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
- MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x19
- >;
- };
-
- pinctrl_ecspi3: ecspi3grp {
- fsl,pins = <
- MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x82
- MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x82
- MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x82
- MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x19
- >;
- };
-
- pinctrl_enet: enetgrp {
- fsl,pins = <
- MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
- MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
- MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
- MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
- MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
- MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
- MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
- MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
- MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
- MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
- MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
- MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
- MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
- MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
- MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x19 /* PHY RST */
- MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x19 /* ETH IRQ */
- >;
- };
-
- pinctrl_gpio_led: gpioledgrp {
- fsl,pins = <
- MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x19
- MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x19
- MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x19
- >;
- };
-
- pinctrl_gpio1: gpio1grp {
- fsl,pins = <
- MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19
- MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
- MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
- MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19
- MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19
- MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19
- MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19
- >;
- };
-
- pinctrl_gpio5: gpio5grp {
- fsl,pins = <
- MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19
- >;
- };
-
- pinctrl_i2c4: i2c4grp {
- fsl,pins = <
- MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000083
- MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000083
- >;
- };
-
- pinctrl_pwm2: pwm2grp {
- fsl,pins = <
- MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x19
- >;
- };
-
- pinctrl_reg_usb1_vbus: regusb1vbusgrp {
- fsl,pins = <
- MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19
- >;
- };
-
- pinctrl_uart1: uart1grp {
- fsl,pins = <
- MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x0
- MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x0
- MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x0
- MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x0
- >;
- };
-
- pinctrl_uart2: uart2grp {
- fsl,pins = <
- MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x0
- MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x0
- MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x0
- MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x0
- >;
- };
-
- pinctrl_usb_eth2: usbeth2grp {
- fsl,pins = <
- MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x19
- >;
- };
-
- pinctrl_usdhc2: usdhc2grp {
- fsl,pins = <
- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x90
- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
- MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19
- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0
- >;
- };
-
- pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
- fsl,pins = <
- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x94
- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
- MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19
- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0
+ MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x19 /* SDIO_B_PWR_EN */
>;
};
- pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
+ pinctrl_usb_hub: usbhubgrp {
fsl,pins = <
- MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x96
- MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
- MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
- MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
- MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
- MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
- MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19
- MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0
+ MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19 /* SDIO_B_WP */
>;
};
};