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-rw-r--r--arch/arm64/boot/dts/ti/k3-am642-sk.dts14
1 files changed, 6 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 1dddd6fc1a..67cd41bf80 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
- * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
@@ -469,9 +469,7 @@
status = "okay";
vmmc-supply = <&vdd_mmc1>;
pinctrl-names = "default";
- bus-width = <4>;
pinctrl-0 = <&main_mmc1_pins_default>;
- ti,driver-strength-ohm = <50>;
disable-wp;
};
@@ -646,25 +644,25 @@
};
&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core0>;
+ mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
memory-region = <&main_r5fss0_core0_dma_memory_region>,
<&main_r5fss0_core0_memory_region>;
};
&main_r5fss0_core1 {
- mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core1>;
+ mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
memory-region = <&main_r5fss0_core1_dma_memory_region>,
<&main_r5fss0_core1_memory_region>;
};
&main_r5fss1_core0 {
- mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core0>;
+ mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
memory-region = <&main_r5fss1_core0_dma_memory_region>,
<&main_r5fss1_core0_memory_region>;
};
&main_r5fss1_core1 {
- mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core1>;
+ mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
memory-region = <&main_r5fss1_core1_dma_memory_region>,
<&main_r5fss1_core1_memory_region>;
};