diff options
Diffstat (limited to 'drivers/clk/starfive/clk-starfive-jh7110-sys.c')
| -rw-r--r-- | drivers/clk/starfive/clk-starfive-jh7110-sys.c | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/drivers/clk/starfive/clk-starfive-jh7110-sys.c b/drivers/clk/starfive/clk-starfive-jh7110-sys.c index 3884eff9fe..8f5e5abfa1 100644 --- a/drivers/clk/starfive/clk-starfive-jh7110-sys.c +++ b/drivers/clk/starfive/clk-starfive-jh7110-sys.c @@ -36,18 +36,18 @@ static const struct jh71x0_clk_data jh7110_sysclk_data[] __initconst = { /* root */ - JH71X0__MUX(JH7110_SYSCLK_CPU_ROOT, "cpu_root", 2, + JH71X0__MUX(JH7110_SYSCLK_CPU_ROOT, "cpu_root", 0, 2, JH7110_SYSCLK_OSC, JH7110_SYSCLK_PLL0_OUT), JH71X0__DIV(JH7110_SYSCLK_CPU_CORE, "cpu_core", 7, JH7110_SYSCLK_CPU_ROOT), JH71X0__DIV(JH7110_SYSCLK_CPU_BUS, "cpu_bus", 2, JH7110_SYSCLK_CPU_CORE), - JH71X0__MUX(JH7110_SYSCLK_GPU_ROOT, "gpu_root", 2, + JH71X0__MUX(JH7110_SYSCLK_GPU_ROOT, "gpu_root", 0, 2, JH7110_SYSCLK_PLL2_OUT, JH7110_SYSCLK_PLL1_OUT), JH71X0_MDIV(JH7110_SYSCLK_PERH_ROOT, "perh_root", 2, 2, JH7110_SYSCLK_PLL0_OUT, JH7110_SYSCLK_PLL2_OUT), - JH71X0__MUX(JH7110_SYSCLK_BUS_ROOT, "bus_root", 2, + JH71X0__MUX(JH7110_SYSCLK_BUS_ROOT, "bus_root", 0, 2, JH7110_SYSCLK_OSC, JH7110_SYSCLK_PLL2_OUT), JH71X0__DIV(JH7110_SYSCLK_NOCSTG_BUS, "nocstg_bus", 3, JH7110_SYSCLK_BUS_ROOT), @@ -62,7 +62,7 @@ static const struct jh71x0_clk_data jh7110_sysclk_data[] __initconst = { JH71X0__DIV(JH7110_SYSCLK_PLL2_DIV2, "pll2_div2", 2, JH7110_SYSCLK_PLL2_OUT), JH71X0__DIV(JH7110_SYSCLK_AUDIO_ROOT, "audio_root", 8, JH7110_SYSCLK_PLL2_OUT), JH71X0__DIV(JH7110_SYSCLK_MCLK_INNER, "mclk_inner", 64, JH7110_SYSCLK_AUDIO_ROOT), - JH71X0__MUX(JH7110_SYSCLK_MCLK, "mclk", 2, + JH71X0__MUX(JH7110_SYSCLK_MCLK, "mclk", 0, 2, JH7110_SYSCLK_MCLK_INNER, JH7110_SYSCLK_MCLK_EXT), JH71X0_GATE(JH7110_SYSCLK_MCLK_OUT, "mclk_out", 0, JH7110_SYSCLK_MCLK_INNER), @@ -96,7 +96,7 @@ static const struct jh71x0_clk_data jh7110_sysclk_data[] __initconst = { JH71X0__DIV(JH7110_SYSCLK_OSC_DIV2, "osc_div2", 2, JH7110_SYSCLK_OSC), JH71X0__DIV(JH7110_SYSCLK_PLL1_DIV4, "pll1_div4", 2, JH7110_SYSCLK_PLL1_DIV2), JH71X0__DIV(JH7110_SYSCLK_PLL1_DIV8, "pll1_div8", 2, JH7110_SYSCLK_PLL1_DIV4), - JH71X0__MUX(JH7110_SYSCLK_DDR_BUS, "ddr_bus", 4, + JH71X0__MUX(JH7110_SYSCLK_DDR_BUS, "ddr_bus", 0, 4, JH7110_SYSCLK_OSC_DIV2, JH7110_SYSCLK_PLL1_DIV2, JH7110_SYSCLK_PLL1_DIV4, @@ -186,7 +186,7 @@ static const struct jh71x0_clk_data jh7110_sysclk_data[] __initconst = { JH71X0__DIV(JH7110_SYSCLK_GMAC1_RMII_RTX, "gmac1_rmii_rtx", 30, JH7110_SYSCLK_GMAC1_RMII_REFIN), JH71X0_GDIV(JH7110_SYSCLK_GMAC1_PTP, "gmac1_ptp", 0, 31, JH7110_SYSCLK_GMAC_SRC), - JH71X0__MUX(JH7110_SYSCLK_GMAC1_RX, "gmac1_rx", 2, + JH71X0__MUX(JH7110_SYSCLK_GMAC1_RX, "gmac1_rx", 0, 2, JH7110_SYSCLK_GMAC1_RGMII_RXIN, JH7110_SYSCLK_GMAC1_RMII_RTX), JH71X0__INV(JH7110_SYSCLK_GMAC1_RX_INV, "gmac1_rx_inv", JH7110_SYSCLK_GMAC1_RX), @@ -270,11 +270,11 @@ static const struct jh71x0_clk_data jh7110_sysclk_data[] __initconst = { JH71X0_MDIV(JH7110_SYSCLK_I2STX0_LRCK_MST, "i2stx0_lrck_mst", 64, 2, JH7110_SYSCLK_I2STX0_BCLK_MST_INV, JH7110_SYSCLK_I2STX0_BCLK_MST), - JH71X0__MUX(JH7110_SYSCLK_I2STX0_BCLK, "i2stx0_bclk", 2, + JH71X0__MUX(JH7110_SYSCLK_I2STX0_BCLK, "i2stx0_bclk", 0, 2, JH7110_SYSCLK_I2STX0_BCLK_MST, JH7110_SYSCLK_I2STX_BCLK_EXT), JH71X0__INV(JH7110_SYSCLK_I2STX0_BCLK_INV, "i2stx0_bclk_inv", JH7110_SYSCLK_I2STX0_BCLK), - JH71X0__MUX(JH7110_SYSCLK_I2STX0_LRCK, "i2stx0_lrck", 2, + JH71X0__MUX(JH7110_SYSCLK_I2STX0_LRCK, "i2stx0_lrck", 0, 2, JH7110_SYSCLK_I2STX0_LRCK_MST, JH7110_SYSCLK_I2STX_LRCK_EXT), /* i2stx1 */ @@ -285,11 +285,11 @@ static const struct jh71x0_clk_data jh7110_sysclk_data[] __initconst = { JH71X0_MDIV(JH7110_SYSCLK_I2STX1_LRCK_MST, "i2stx1_lrck_mst", 64, 2, JH7110_SYSCLK_I2STX1_BCLK_MST_INV, JH7110_SYSCLK_I2STX1_BCLK_MST), - JH71X0__MUX(JH7110_SYSCLK_I2STX1_BCLK, "i2stx1_bclk", 2, + JH71X0__MUX(JH7110_SYSCLK_I2STX1_BCLK, "i2stx1_bclk", 0, 2, JH7110_SYSCLK_I2STX1_BCLK_MST, JH7110_SYSCLK_I2STX_BCLK_EXT), JH71X0__INV(JH7110_SYSCLK_I2STX1_BCLK_INV, "i2stx1_bclk_inv", JH7110_SYSCLK_I2STX1_BCLK), - JH71X0__MUX(JH7110_SYSCLK_I2STX1_LRCK, "i2stx1_lrck", 2, + JH71X0__MUX(JH7110_SYSCLK_I2STX1_LRCK, "i2stx1_lrck", 0, 2, JH7110_SYSCLK_I2STX1_LRCK_MST, JH7110_SYSCLK_I2STX_LRCK_EXT), /* i2srx */ @@ -300,11 +300,11 @@ static const struct jh71x0_clk_data jh7110_sysclk_data[] __initconst = { JH71X0_MDIV(JH7110_SYSCLK_I2SRX_LRCK_MST, "i2srx_lrck_mst", 64, 2, JH7110_SYSCLK_I2SRX_BCLK_MST_INV, JH7110_SYSCLK_I2SRX_BCLK_MST), - JH71X0__MUX(JH7110_SYSCLK_I2SRX_BCLK, "i2srx_bclk", 2, + JH71X0__MUX(JH7110_SYSCLK_I2SRX_BCLK, "i2srx_bclk", 0, 2, JH7110_SYSCLK_I2SRX_BCLK_MST, JH7110_SYSCLK_I2SRX_BCLK_EXT), JH71X0__INV(JH7110_SYSCLK_I2SRX_BCLK_INV, "i2srx_bclk_inv", JH7110_SYSCLK_I2SRX_BCLK), - JH71X0__MUX(JH7110_SYSCLK_I2SRX_LRCK, "i2srx_lrck", 2, + JH71X0__MUX(JH7110_SYSCLK_I2SRX_LRCK, "i2srx_lrck", 0, 2, JH7110_SYSCLK_I2SRX_LRCK_MST, JH7110_SYSCLK_I2SRX_LRCK_EXT), /* pdm */ @@ -314,7 +314,7 @@ static const struct jh71x0_clk_data jh7110_sysclk_data[] __initconst = { JH71X0_GATE(JH7110_SYSCLK_TDM_AHB, "tdm_ahb", 0, JH7110_SYSCLK_AHB0), JH71X0_GATE(JH7110_SYSCLK_TDM_APB, "tdm_apb", 0, JH7110_SYSCLK_APB0), JH71X0_GDIV(JH7110_SYSCLK_TDM_INTERNAL, "tdm_internal", 0, 64, JH7110_SYSCLK_MCLK), - JH71X0__MUX(JH7110_SYSCLK_TDM_TDM, "tdm_tdm", 2, + JH71X0__MUX(JH7110_SYSCLK_TDM_TDM, "tdm_tdm", 0, 2, JH7110_SYSCLK_TDM_INTERNAL, JH7110_SYSCLK_TDM_EXT), JH71X0__INV(JH7110_SYSCLK_TDM_TDM_INV, "tdm_tdm_inv", JH7110_SYSCLK_TDM_TDM), |