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-rw-r--r--drivers/clk/sunxi/clk-a20-gmac.c21
-rw-r--r--drivers/clk/sunxi/clk-sun9i-cpus.c7
-rw-r--r--drivers/clk/sunxi/clk-usb.c9
3 files changed, 21 insertions, 16 deletions
diff --git a/drivers/clk/sunxi/clk-a20-gmac.c b/drivers/clk/sunxi/clk-a20-gmac.c
index 0b09230a0d..43080c7d04 100644
--- a/drivers/clk/sunxi/clk-a20-gmac.c
+++ b/drivers/clk/sunxi/clk-a20-gmac.c
@@ -15,8 +15,19 @@
static DEFINE_SPINLOCK(gmac_lock);
+
+#define SUN7I_A20_GMAC_GPIT 2
+#define SUN7I_A20_GMAC_MASK 0x3
+#define SUN7I_A20_GMAC_PARENTS 2
+
+static u32 sun7i_a20_gmac_mux_table[SUN7I_A20_GMAC_PARENTS] = {
+ 0x00, /* Select mii_phy_tx_clk */
+ 0x02, /* Select gmac_int_tx_clk */
+};
+
/**
* sun7i_a20_gmac_clk_setup - Setup function for A20/A31 GMAC clock module
+ * @node: &struct device_node for the clock
*
* This clock looks something like this
* ________________________
@@ -39,16 +50,6 @@ static DEFINE_SPINLOCK(gmac_lock);
* enable/disable this clock to configure the required state. The clock
* driver then responds by auto-reparenting the clock.
*/
-
-#define SUN7I_A20_GMAC_GPIT 2
-#define SUN7I_A20_GMAC_MASK 0x3
-#define SUN7I_A20_GMAC_PARENTS 2
-
-static u32 sun7i_a20_gmac_mux_table[SUN7I_A20_GMAC_PARENTS] = {
- 0x00, /* Select mii_phy_tx_clk */
- 0x02, /* Select gmac_int_tx_clk */
-};
-
static void __init sun7i_a20_gmac_clk_setup(struct device_node *node)
{
struct clk *clk;
diff --git a/drivers/clk/sunxi/clk-sun9i-cpus.c b/drivers/clk/sunxi/clk-sun9i-cpus.c
index 01255d827f..48bf899bb2 100644
--- a/drivers/clk/sunxi/clk-sun9i-cpus.c
+++ b/drivers/clk/sunxi/clk-sun9i-cpus.c
@@ -18,9 +18,6 @@
static DEFINE_SPINLOCK(sun9i_a80_cpus_lock);
-/**
- * sun9i_a80_cpus_clk_setup() - Setup function for a80 cpus composite clk
- */
#define SUN9I_CPUS_MAX_PARENTS 4
#define SUN9I_CPUS_MUX_PARENT_PLL4 3
@@ -180,6 +177,10 @@ static const struct clk_ops sun9i_a80_cpus_clk_ops = {
.set_rate = sun9i_a80_cpus_clk_set_rate,
};
+/**
+ * sun9i_a80_cpus_setup() - Setup function for a80 cpus composite clk
+ * @node: &struct device_node for the clock
+ */
static void sun9i_a80_cpus_setup(struct device_node *node)
{
const char *clk_name = node->name;
diff --git a/drivers/clk/sunxi/clk-usb.c b/drivers/clk/sunxi/clk-usb.c
index 5460218f34..3c53f65002 100644
--- a/drivers/clk/sunxi/clk-usb.c
+++ b/drivers/clk/sunxi/clk-usb.c
@@ -73,9 +73,6 @@ static const struct reset_control_ops sunxi_usb_reset_ops = {
.deassert = sunxi_usb_reset_deassert,
};
-/**
- * sunxi_usb_clk_setup() - Setup function for usb gate clocks
- */
#define SUNXI_USB_MAX_SIZE 32
@@ -85,6 +82,12 @@ struct usb_clk_data {
bool reset_needs_clk;
};
+/**
+ * sunxi_usb_clk_setup() - Setup function for usb gate clocks
+ * @node: &struct device_node for the clock
+ * @data: &struct usb_clk_data for the clock
+ * @lock: spinlock for the clock
+ */
static void __init sunxi_usb_clk_setup(struct device_node *node,
const struct usb_clk_data *data,
spinlock_t *lock)