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Diffstat (limited to 'drivers/dma/fsl-edma-common.h')
-rw-r--r--drivers/dma/fsl-edma-common.h111
1 files changed, 59 insertions, 52 deletions
diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h
index 7bf0aba471..268db38767 100644
--- a/drivers/dma/fsl-edma-common.h
+++ b/drivers/dma/fsl-edma-common.h
@@ -151,7 +151,6 @@ struct fsl_edma_chan {
enum dma_status status;
enum fsl_edma_pm_state pm_state;
bool idle;
- u32 slave_id;
struct fsl_edma_engine *edma;
struct fsl_edma_desc *edesc;
struct dma_slave_config cfg;
@@ -195,8 +194,7 @@ struct fsl_edma_desc {
#define FSL_EDMA_DRV_HAS_PD BIT(5)
#define FSL_EDMA_DRV_HAS_CHCLK BIT(6)
#define FSL_EDMA_DRV_HAS_CHMUX BIT(7)
-/* imx8 QM audio edma remote local swapped */
-#define FSL_EDMA_DRV_QUIRK_SWAPPED BIT(8)
+#define FSL_EDMA_DRV_MEM_REMOTE BIT(8)
/* control and status register is in tcd address space, edma3 reg layout */
#define FSL_EDMA_DRV_SPLIT_REG BIT(9)
#define FSL_EDMA_DRV_BUS_8BYTE BIT(10)
@@ -238,7 +236,6 @@ struct fsl_edma_engine {
void __iomem *muxbase[DMAMUX_NR];
struct clk *muxclk[DMAMUX_NR];
struct clk *dmaclk;
- struct clk *chclk;
struct mutex fsl_edma_mutex;
const struct fsl_edma_drvdata *drvdata;
u32 n_chans;
@@ -250,13 +247,17 @@ struct fsl_edma_engine {
struct fsl_edma_chan chans[] __counted_by(n_chans);
};
+static inline u32 fsl_edma_drvflags(struct fsl_edma_chan *fsl_chan)
+{
+ return fsl_chan->edma->drvdata->flags;
+}
+
#define edma_read_tcdreg_c(chan, _tcd, __name) \
-(sizeof((_tcd)->__name) == sizeof(u64) ? \
- edma_readq(chan->edma, &(_tcd)->__name) : \
- ((sizeof((_tcd)->__name) == sizeof(u32)) ? \
- edma_readl(chan->edma, &(_tcd)->__name) : \
- edma_readw(chan->edma, &(_tcd)->__name) \
- ))
+_Generic(((_tcd)->__name), \
+ __iomem __le64 : edma_readq(chan->edma, &(_tcd)->__name), \
+ __iomem __le32 : edma_readl(chan->edma, &(_tcd)->__name), \
+ __iomem __le16 : edma_readw(chan->edma, &(_tcd)->__name) \
+ )
#define edma_read_tcdreg(chan, __name) \
((fsl_edma_drvflags(chan) & FSL_EDMA_DRV_TCD64) ? \
@@ -264,23 +265,13 @@ struct fsl_edma_engine {
edma_read_tcdreg_c(chan, ((struct fsl_edma_hw_tcd __iomem *)chan->tcd), __name) \
)
-#define edma_write_tcdreg_c(chan, _tcd, _val, __name) \
-do { \
- switch (sizeof(_tcd->__name)) { \
- case sizeof(u64): \
- edma_writeq(chan->edma, (u64 __force)_val, &_tcd->__name); \
- break; \
- case sizeof(u32): \
- edma_writel(chan->edma, (u32 __force)_val, &_tcd->__name); \
- break; \
- case sizeof(u16): \
- edma_writew(chan->edma, (u16 __force)_val, &_tcd->__name); \
- break; \
- case sizeof(u8): \
- edma_writeb(chan->edma, (u8 __force)_val, &_tcd->__name); \
- break; \
- } \
-} while (0)
+#define edma_write_tcdreg_c(chan, _tcd, _val, __name) \
+_Generic((_tcd->__name), \
+ __iomem __le64 : edma_writeq(chan->edma, (u64 __force)(_val), &_tcd->__name), \
+ __iomem __le32 : edma_writel(chan->edma, (u32 __force)(_val), &_tcd->__name), \
+ __iomem __le16 : edma_writew(chan->edma, (u16 __force)(_val), &_tcd->__name), \
+ __iomem u8 : edma_writeb(chan->edma, _val, &_tcd->__name) \
+ )
#define edma_write_tcdreg(chan, val, __name) \
do { \
@@ -321,9 +312,11 @@ do { \
(((struct fsl_edma_hw_tcd *)_tcd)->_field))
#define fsl_edma_le_to_cpu(x) \
-(sizeof(x) == sizeof(u64) ? le64_to_cpu((__force __le64)(x)) : \
- (sizeof(x) == sizeof(u32) ? le32_to_cpu((__force __le32)(x)) : \
- le16_to_cpu((__force __le16)(x))))
+_Generic((x), \
+ __le64 : le64_to_cpu((x)), \
+ __le32 : le32_to_cpu((x)), \
+ __le16 : le16_to_cpu((x)) \
+)
#define fsl_edma_get_tcd_to_cpu(_chan, _tcd, _field) \
(fsl_edma_drvflags(_chan) & FSL_EDMA_DRV_TCD64 ? \
@@ -331,19 +324,11 @@ do { \
fsl_edma_le_to_cpu(((struct fsl_edma_hw_tcd *)_tcd)->_field))
#define fsl_edma_set_tcd_to_le_c(_tcd, _val, _field) \
-do { \
- switch (sizeof((_tcd)->_field)) { \
- case sizeof(u64): \
- *(__force __le64 *)(&((_tcd)->_field)) = cpu_to_le64(_val); \
- break; \
- case sizeof(u32): \
- *(__force __le32 *)(&((_tcd)->_field)) = cpu_to_le32(_val); \
- break; \
- case sizeof(u16): \
- *(__force __le16 *)(&((_tcd)->_field)) = cpu_to_le16(_val); \
- break; \
- } \
-} while (0)
+_Generic(((_tcd)->_field), \
+ __le64 : (_tcd)->_field = cpu_to_le64(_val), \
+ __le32 : (_tcd)->_field = cpu_to_le32(_val), \
+ __le16 : (_tcd)->_field = cpu_to_le16(_val) \
+)
#define fsl_edma_set_tcd_to_le(_chan, _tcd, _val, _field) \
do { \
@@ -353,6 +338,9 @@ do { \
fsl_edma_set_tcd_to_le_c((struct fsl_edma_hw_tcd *)_tcd, _val, _field); \
} while (0)
+/* Need after struct defination */
+#include "fsl-edma-trace.h"
+
/*
* R/W functions for big- or little-endian registers:
* The eDMA controller's endian is independent of the CPU core's endian.
@@ -371,23 +359,38 @@ static inline u64 edma_readq(struct fsl_edma_engine *edma, void __iomem *addr)
h = ioread32(addr + 4);
}
+ trace_edma_readl(edma, addr, l);
+ trace_edma_readl(edma, addr + 4, h);
+
return (h << 32) | l;
}
static inline u32 edma_readl(struct fsl_edma_engine *edma, void __iomem *addr)
{
+ u32 val;
+
if (edma->big_endian)
- return ioread32be(addr);
+ val = ioread32be(addr);
else
- return ioread32(addr);
+ val = ioread32(addr);
+
+ trace_edma_readl(edma, addr, val);
+
+ return val;
}
static inline u16 edma_readw(struct fsl_edma_engine *edma, void __iomem *addr)
{
+ u16 val;
+
if (edma->big_endian)
- return ioread16be(addr);
+ val = ioread16be(addr);
else
- return ioread16(addr);
+ val = ioread16(addr);
+
+ trace_edma_readw(edma, addr, val);
+
+ return val;
}
static inline void edma_writeb(struct fsl_edma_engine *edma,
@@ -398,6 +401,8 @@ static inline void edma_writeb(struct fsl_edma_engine *edma,
iowrite8(val, (void __iomem *)((unsigned long)addr ^ 0x3));
else
iowrite8(val, addr);
+
+ trace_edma_writeb(edma, addr, val);
}
static inline void edma_writew(struct fsl_edma_engine *edma,
@@ -408,6 +413,8 @@ static inline void edma_writew(struct fsl_edma_engine *edma,
iowrite16be(val, (void __iomem *)((unsigned long)addr ^ 0x2));
else
iowrite16(val, addr);
+
+ trace_edma_writew(edma, addr, val);
}
static inline void edma_writel(struct fsl_edma_engine *edma,
@@ -417,6 +424,8 @@ static inline void edma_writel(struct fsl_edma_engine *edma,
iowrite32be(val, addr);
else
iowrite32(val, addr);
+
+ trace_edma_writel(edma, addr, val);
}
static inline void edma_writeq(struct fsl_edma_engine *edma,
@@ -429,6 +438,9 @@ static inline void edma_writeq(struct fsl_edma_engine *edma,
iowrite32(val & 0xFFFFFFFF, addr);
iowrite32(val >> 32, addr + 4);
}
+
+ trace_edma_writel(edma, addr, val & 0xFFFFFFFF);
+ trace_edma_writel(edma, addr + 4, val >> 32);
}
static inline struct fsl_edma_chan *to_fsl_edma_chan(struct dma_chan *chan)
@@ -436,11 +448,6 @@ static inline struct fsl_edma_chan *to_fsl_edma_chan(struct dma_chan *chan)
return container_of(chan, struct fsl_edma_chan, vchan.chan);
}
-static inline u32 fsl_edma_drvflags(struct fsl_edma_chan *fsl_chan)
-{
- return fsl_chan->edma->drvdata->flags;
-}
-
static inline struct fsl_edma_desc *to_fsl_edma_desc(struct virt_dma_desc *vd)
{
return container_of(vd, struct fsl_edma_desc, vdesc);
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-15 04:11:32 +0000