diff options
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c index 3e65e683db..c97391edb5 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c @@ -50,7 +50,7 @@ #include "dcn314/dcn314_optc.h" #include "dcn20/dcn20_hwseq.h" #include "dcn30/dcn30_hwseq.h" -#include "dce110/dce110_hw_sequencer.h" +#include "dce110/dce110_hwseq.h" #include "dcn30/dcn30_opp.h" #include "dcn20/dcn20_dsc.h" #include "dcn30/dcn30_vpg.h" @@ -118,6 +118,8 @@ #define regBIF_BX2_BIOS_SCRATCH_6 0x003e #define regBIF_BX2_BIOS_SCRATCH_6_BASE_IDX 1 +#define DC_LOGGER \ + dc->ctx->logger #define DC_LOGGER_INIT(logger) enum dcn31_clk_src_array_id { @@ -914,7 +916,7 @@ static const struct dc_debug_options debug_defaults_drv = { .hdmistream = true, .hdmichar = true, .dpstream = true, - .symclk32_se = true, + .symclk32_se = false, .symclk32_le = true, .symclk_fe = true, .physymclk = true, @@ -922,7 +924,8 @@ static const struct dc_debug_options debug_defaults_drv = { } }, - .seamless_boot_odm_combine = true + .seamless_boot_odm_combine = true, + .using_dml2 = false, }; static const struct dc_debug_options debug_defaults_diags = { @@ -1796,6 +1799,7 @@ static struct resource_funcs dcn314_res_pool_funcs = { .update_soc_for_wm_a = dcn31_update_soc_for_wm_a, .populate_dml_pipes = dcn314_populate_dml_pipes_from_context, .acquire_free_pipe_as_secondary_dpp_pipe = dcn20_acquire_free_pipe_for_layer, + .release_pipe = dcn20_release_pipe, .add_stream_to_ctx = dcn30_add_stream_to_ctx, .add_dsc_to_stream_resource = dcn20_add_dsc_to_stream_resource, .remove_stream_from_ctx = dcn20_remove_stream_from_ctx, @@ -1911,6 +1915,8 @@ static bool dcn314_resource_construct( dc->caps.color.mpc.ogam_rom_caps.hlg = 0; dc->caps.color.mpc.ocsc = 1; + dc->caps.max_disp_clock_khz_at_vmin = 650000; + /* Use pipe context based otg sync logic */ dc->config.use_pipe_ctx_sync_logic = true; |