diff options
Diffstat (limited to 'drivers/gpu/drm/i915/gvt')
-rw-r--r-- | drivers/gpu/drm/i915/gvt/fb_decoder.h | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/gtt.h | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/gvt.h | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/interrupt.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/interrupt.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/kvmgt.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/mmio.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/gvt/scheduler.h | 2 |
8 files changed, 1 insertions, 27 deletions
diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.h b/drivers/gpu/drm/i915/gvt/fb_decoder.h index 4eff441944..fa6503900c 100644 --- a/drivers/gpu/drm/i915/gvt/fb_decoder.h +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.h @@ -152,17 +152,6 @@ struct intel_vgpu_cursor_plane_format { u32 y_hot; /* in pixels */ }; -struct intel_vgpu_pipe_format { - struct intel_vgpu_primary_plane_format primary; - struct intel_vgpu_sprite_plane_format sprite; - struct intel_vgpu_cursor_plane_format cursor; - enum DDI_PORT ddi_port; /* the DDI port that pipe is connected to */ -}; - -struct intel_vgpu_fb_format { - struct intel_vgpu_pipe_format pipes[I915_MAX_PIPES]; -}; - int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu, struct intel_vgpu_primary_plane_format *plane); int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu, diff --git a/drivers/gpu/drm/i915/gvt/gtt.h b/drivers/gpu/drm/i915/gvt/gtt.h index 4cb183e06e..cb50700e6c 100644 --- a/drivers/gpu/drm/i915/gvt/gtt.h +++ b/drivers/gpu/drm/i915/gvt/gtt.h @@ -93,8 +93,6 @@ struct intel_gvt_gtt_gma_ops { struct intel_gvt_gtt { const struct intel_gvt_gtt_pte_ops *pte_ops; const struct intel_gvt_gtt_gma_ops *gma_ops; - int (*mm_alloc_page_table)(struct intel_vgpu_mm *mm); - void (*mm_free_page_table)(struct intel_vgpu_mm *mm); struct list_head oos_page_use_list_head; struct list_head oos_page_free_list_head; struct mutex ppgtt_mm_lock; @@ -210,7 +208,6 @@ struct intel_vgpu_scratch_pt { struct intel_vgpu_gtt { struct intel_vgpu_mm *ggtt_mm; - unsigned long active_ppgtt_mm_bitmap; struct list_head ppgtt_mm_list_head; struct radix_tree_root spt_tree; struct list_head oos_page_list_head; diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h index c57aba0909..2c95aeef4e 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.h +++ b/drivers/gpu/drm/i915/gvt/gvt.h @@ -89,7 +89,6 @@ struct intel_vgpu_gm { /* Fences owned by a vGPU */ struct intel_vgpu_fence { struct i915_fence_reg *regs[INTEL_GVT_MAX_NUM_FENCES]; - u32 base; u32 size; }; @@ -119,7 +118,6 @@ struct intel_vgpu_irq { }; struct intel_vgpu_opregion { - bool mapped; void *va; u32 gfn[INTEL_GVT_OPREGION_PAGES]; }; @@ -223,7 +221,6 @@ struct intel_vgpu { struct vfio_region *region; int num_regions; - struct eventfd_ctx *intx_trigger; struct eventfd_ctx *msi_trigger; /* @@ -256,7 +253,6 @@ struct intel_gvt_fence { /* Special MMIO blocks. */ struct gvt_mmio_block { - unsigned int device; i915_reg_t offset; unsigned int size; gvt_mmio_func read; @@ -444,7 +440,6 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt); #define vgpu_hidden_gmadr_end(vgpu) \ (vgpu_hidden_gmadr_base(vgpu) + vgpu_hidden_sz(vgpu) - 1) -#define vgpu_fence_base(vgpu) (vgpu->fence.base) #define vgpu_fence_sz(vgpu) (vgpu->fence.size) /* ring context size i.e. the first 0x50 dwords*/ diff --git a/drivers/gpu/drm/i915/gvt/interrupt.c b/drivers/gpu/drm/i915/gvt/interrupt.c index c8e7dfc9f7..336d079c42 100644 --- a/drivers/gpu/drm/i915/gvt/interrupt.c +++ b/drivers/gpu/drm/i915/gvt/interrupt.c @@ -40,7 +40,6 @@ struct intel_gvt_irq_info { char *name; i915_reg_t reg_base; enum intel_gvt_event_type bit_to_event[INTEL_GVT_IRQ_BITWIDTH]; - unsigned long warned; int group; DECLARE_BITMAP(downstream_irq_bitmap, INTEL_GVT_IRQ_BITWIDTH); bool has_upstream_irq; diff --git a/drivers/gpu/drm/i915/gvt/interrupt.h b/drivers/gpu/drm/i915/gvt/interrupt.h index e60ad476fe..cd214be986 100644 --- a/drivers/gpu/drm/i915/gvt/interrupt.h +++ b/drivers/gpu/drm/i915/gvt/interrupt.h @@ -177,7 +177,6 @@ enum intel_gvt_irq_type { /* per-event information */ struct intel_gvt_event_info { int bit; /* map to register bit */ - int policy; /* forwarding policy */ struct intel_gvt_irq_info *info; /* register info */ gvt_event_virt_handler_t v_handler; /* for v_event */ }; @@ -188,7 +187,6 @@ struct intel_gvt_irq { struct intel_gvt_irq_info *info[INTEL_GVT_IRQ_INFO_MAX]; DECLARE_BITMAP(irq_info_bitmap, INTEL_GVT_IRQ_INFO_MAX); struct intel_gvt_event_info events[INTEL_GVT_EVENT_MAX]; - DECLARE_BITMAP(pending_events, INTEL_GVT_EVENT_MAX); struct intel_gvt_irq_map *irq_map; }; diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c index faf21be724..4f74d867fe 100644 --- a/drivers/gpu/drm/i915/gvt/kvmgt.c +++ b/drivers/gpu/drm/i915/gvt/kvmgt.c @@ -574,7 +574,7 @@ int intel_gvt_set_opregion(struct intel_vgpu *vgpu) ret = intel_vgpu_register_reg(vgpu, PCI_VENDOR_ID_INTEL | VFIO_REGION_TYPE_PCI_VENDOR_TYPE, VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION, - &intel_vgpu_regops_opregion, OPREGION_SIZE, + &intel_vgpu_regops_opregion, INTEL_GVT_OPREGION_SIZE, VFIO_REGION_INFO_FLAG_READ, base); return ret; diff --git a/drivers/gpu/drm/i915/gvt/mmio.h b/drivers/gpu/drm/i915/gvt/mmio.h index bba154e387..32ebacb078 100644 --- a/drivers/gpu/drm/i915/gvt/mmio.h +++ b/drivers/gpu/drm/i915/gvt/mmio.h @@ -62,10 +62,8 @@ typedef int (*gvt_mmio_func)(struct intel_vgpu *, unsigned int, void *, struct intel_gvt_mmio_info { u32 offset; u64 ro_mask; - u32 device; gvt_mmio_func read; gvt_mmio_func write; - u32 addr_range; struct hlist_node node; }; diff --git a/drivers/gpu/drm/i915/gvt/scheduler.h b/drivers/gpu/drm/i915/gvt/scheduler.h index 1f391b3da2..cd94993278 100644 --- a/drivers/gpu/drm/i915/gvt/scheduler.h +++ b/drivers/gpu/drm/i915/gvt/scheduler.h @@ -104,10 +104,8 @@ struct intel_vgpu_workload { /* execlist context information */ struct execlist_ctx_descriptor_format ctx_desc; - struct execlist_ring_context *ring_context; unsigned long rb_head, rb_tail, rb_ctl, rb_start, rb_len; unsigned long guest_rb_head; - bool restore_inhibit; struct intel_vgpu_elsp_dwords elsp_dwords; bool emulate_schedule_in; atomic_t shadow_ctx_active; |