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path: root/drivers/gpu/drm/i915/i915_perf.c
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Diffstat (limited to 'drivers/gpu/drm/i915/i915_perf.c')
-rw-r--r--drivers/gpu/drm/i915/i915_perf.c119
1 files changed, 26 insertions, 93 deletions
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 8f4a25d2c..2d695818f 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -206,6 +206,7 @@
#include "gt/intel_gt.h"
#include "gt/intel_gt_clock_utils.h"
#include "gt/intel_gt_mcr.h"
+#include "gt/intel_gt_print.h"
#include "gt/intel_gt_regs.h"
#include "gt/intel_lrc.h"
#include "gt/intel_lrc_reg.h"
@@ -542,10 +543,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
{
u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
int report_size = stream->oa_buffer.format->size;
- u32 head, tail, read_tail;
+ u32 tail, hw_tail;
unsigned long flags;
bool pollin;
- u32 hw_tail;
u32 partial_report_size;
/* We have to consider the (unlikely) possibility that read() errors
@@ -555,6 +555,7 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
hw_tail = stream->perf->ops.oa_hw_tail_read(stream);
+ hw_tail -= gtt_offset;
/* The tail pointer increases in 64 byte increments, not in report_size
* steps. Also the report size may not be a power of 2. Compute
@@ -566,13 +567,6 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
/* Subtract partial amount off the tail */
hw_tail = OA_TAKEN(hw_tail, partial_report_size);
- /* NB: The head we observe here might effectively be a little
- * out of date. If a read() is in progress, the head could be
- * anywhere between this head and stream->oa_buffer.tail.
- */
- head = stream->oa_buffer.head - gtt_offset;
- read_tail = stream->oa_buffer.tail - gtt_offset;
-
tail = hw_tail;
/* Walk the stream backward until we find a report with report
@@ -586,7 +580,7 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
* memory in the order they were written to.
* If not : (╯°□°)╯︵ ┻━┻
*/
- while (OA_TAKEN(tail, read_tail) >= report_size) {
+ while (OA_TAKEN(tail, stream->oa_buffer.tail) >= report_size) {
void *report = stream->oa_buffer.vaddr + tail;
if (oa_report_id(stream, report) ||
@@ -600,9 +594,9 @@ static bool oa_buffer_check_unlocked(struct i915_perf_stream *stream)
__ratelimit(&stream->perf->tail_pointer_race))
drm_notice(&stream->uncore->i915->drm,
"unlanded report(s) head=0x%x tail=0x%x hw_tail=0x%x\n",
- head, tail, hw_tail);
+ stream->oa_buffer.head, tail, hw_tail);
- stream->oa_buffer.tail = gtt_offset + tail;
+ stream->oa_buffer.tail = tail;
pollin = OA_TAKEN(stream->oa_buffer.tail,
stream->oa_buffer.head) >= report_size;
@@ -753,13 +747,6 @@ static int gen8_append_oa_reports(struct i915_perf_stream *stream,
spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
/*
- * NB: oa_buffer.head/tail include the gtt_offset which we don't want
- * while indexing relative to oa_buf_base.
- */
- head -= gtt_offset;
- tail -= gtt_offset;
-
- /*
* An out of bounds or misaligned head or tail pointer implies a driver
* bug since we validate + align the tail pointers we read from the
* hardware and we are in full control of the head pointer which should
@@ -923,9 +910,8 @@ static int gen8_append_oa_reports(struct i915_perf_stream *stream,
* We removed the gtt_offset for the copy loop above, indexing
* relative to oa_buf_base so put back here...
*/
- head += gtt_offset;
intel_uncore_write(uncore, oaheadptr,
- head & GEN12_OAG_OAHEADPTR_MASK);
+ (head + gtt_offset) & GEN12_OAG_OAHEADPTR_MASK);
stream->oa_buffer.head = head;
spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
@@ -1070,12 +1056,6 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
- /* NB: oa_buffer.head/tail include the gtt_offset which we don't want
- * while indexing relative to oa_buf_base.
- */
- head -= gtt_offset;
- tail -= gtt_offset;
-
/* An out of bounds or misaligned head or tail pointer implies a driver
* bug since we validate + align the tail pointers we read from the
* hardware and we are in full control of the head pointer which should
@@ -1138,13 +1118,8 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
if (start_offset != *offset) {
spin_lock_irqsave(&stream->oa_buffer.ptr_lock, flags);
- /* We removed the gtt_offset for the copy loop above, indexing
- * relative to oa_buf_base so put back here...
- */
- head += gtt_offset;
-
intel_uncore_write(uncore, GEN7_OASTATUS2,
- (head & GEN7_OASTATUS2_HEAD_MASK) |
+ ((head + gtt_offset) & GEN7_OASTATUS2_HEAD_MASK) |
GEN7_OASTATUS2_MEM_SELECT_GGTT);
stream->oa_buffer.head = head;
@@ -1703,13 +1678,6 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
free_oa_buffer(stream);
- /*
- * Wa_16011777198:dg2: Unset the override of GUCRC mode to enable rc6.
- */
- if (stream->override_gucrc)
- drm_WARN_ON(&gt->i915->drm,
- intel_guc_slpc_unset_gucrc_mode(&gt->uc.guc.slpc));
-
intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL);
intel_engine_pm_put(stream->engine);
@@ -1720,9 +1688,8 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
free_noa_wait(stream);
if (perf->spurious_report_rs.missed) {
- drm_notice(&gt->i915->drm,
- "%d spurious OA report notices suppressed due to ratelimiting\n",
- perf->spurious_report_rs.missed);
+ gt_notice(gt, "%d spurious OA report notices suppressed due to ratelimiting\n",
+ perf->spurious_report_rs.missed);
}
}
@@ -1739,7 +1706,7 @@ static void gen7_init_oa_buffer(struct i915_perf_stream *stream)
*/
intel_uncore_write(uncore, GEN7_OASTATUS2, /* head */
gtt_offset | GEN7_OASTATUS2_MEM_SELECT_GGTT);
- stream->oa_buffer.head = gtt_offset;
+ stream->oa_buffer.head = 0;
intel_uncore_write(uncore, GEN7_OABUFFER, gtt_offset);
@@ -1747,7 +1714,7 @@ static void gen7_init_oa_buffer(struct i915_perf_stream *stream)
gtt_offset | OABUFFER_SIZE_16M);
/* Mark that we need updated tail pointers to read from... */
- stream->oa_buffer.tail = gtt_offset;
+ stream->oa_buffer.tail = 0;
spin_unlock_irqrestore(&stream->oa_buffer.ptr_lock, flags);
@@ -1781,7 +1748,7 @@ static void gen8_init_oa_buffer(struct i915_perf_stream *stream)
intel_uncore_write(uncore, GEN8_OASTATUS, 0);
intel_uncore_write(uncore, GEN8_OAHEADPTR, gtt_offset);
- stream->oa_buffer.head = gtt_offset;
+ stream->oa_buffer.head = 0;
intel_uncore_write(uncore, GEN8_OABUFFER_UDW, 0);
@@ -1798,7 +1765,7 @@ static void gen8_init_oa_buffer(struct i915_perf_stream *stream)
intel_uncore_write(uncore, GEN8_OATAILPTR, gtt_offset & GEN8_OATAILPTR_MASK);
/* Mark that we need updated tail pointers to read from... */
- stream->oa_buffer.tail = gtt_offset;
+ stream->oa_buffer.tail = 0;
/*
* Reset state used to recognise context switches, affecting which
@@ -1835,7 +1802,7 @@ static void gen12_init_oa_buffer(struct i915_perf_stream *stream)
intel_uncore_write(uncore, __oa_regs(stream)->oa_status, 0);
intel_uncore_write(uncore, __oa_regs(stream)->oa_head_ptr,
gtt_offset & GEN12_OAG_OAHEADPTR_MASK);
- stream->oa_buffer.head = gtt_offset;
+ stream->oa_buffer.head = 0;
/*
* PRM says:
@@ -1851,7 +1818,7 @@ static void gen12_init_oa_buffer(struct i915_perf_stream *stream)
gtt_offset & GEN12_OAG_OATAILPTR_MASK);
/* Mark that we need updated tail pointers to read from... */
- stream->oa_buffer.tail = gtt_offset;
+ stream->oa_buffer.tail = 0;
/*
* Reset state used to recognise context switches, affecting which
@@ -1913,7 +1880,7 @@ static int alloc_oa_buffer(struct i915_perf_stream *stream)
*/
ret = i915_vma_pin(vma, 0, SZ_16M, PIN_GLOBAL | PIN_HIGH);
if (ret) {
- drm_err(&gt->i915->drm, "Failed to pin OA buffer %d\n", ret);
+ gt_err(gt, "Failed to pin OA buffer %d\n", ret);
goto err_unref;
}
@@ -3255,11 +3222,10 @@ get_sseu_config(struct intel_sseu *out_sseu,
*/
u32 i915_perf_oa_timestamp_frequency(struct drm_i915_private *i915)
{
- /*
- * Wa_18013179988:dg2
- * Wa_14015846243:mtl
- */
- if (IS_DG2(i915) || IS_METEORLAKE(i915)) {
+ struct intel_gt *gt = to_gt(i915);
+
+ /* Wa_18013179988 */
+ if (IS_DG2(i915) || IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) {
intel_wakeref_t wakeref;
u32 reg, shift;
@@ -3300,7 +3266,6 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
struct drm_i915_private *i915 = stream->perf->i915;
struct i915_perf *perf = stream->perf;
struct i915_perf_group *g;
- struct intel_gt *gt;
int ret;
if (!props->engine) {
@@ -3308,7 +3273,6 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
"OA engine not specified\n");
return -EINVAL;
}
- gt = props->engine->gt;
g = props->engine->oa_group;
/*
@@ -3409,25 +3373,6 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
intel_engine_pm_get(stream->engine);
intel_uncore_forcewake_get(stream->uncore, FORCEWAKE_ALL);
- /*
- * Wa_16011777198:dg2: GuC resets render as part of the Wa. This causes
- * OA to lose the configuration state. Prevent this by overriding GUCRC
- * mode.
- */
- if (intel_uc_uses_guc_rc(&gt->uc) &&
- (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||
- IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0))) {
- ret = intel_guc_slpc_override_gucrc_mode(&gt->uc.guc.slpc,
- SLPC_GUCRC_MODE_GUCRC_NO_RC6);
- if (ret) {
- drm_dbg(&stream->perf->i915->drm,
- "Unable to override gucrc mode\n");
- goto err_gucrc;
- }
-
- stream->override_gucrc = true;
- }
-
ret = alloc_oa_buffer(stream);
if (ret)
goto err_oa_buf_alloc;
@@ -3464,10 +3409,6 @@ err_enable:
free_oa_buffer(stream);
err_oa_buf_alloc:
- if (stream->override_gucrc)
- intel_guc_slpc_unset_gucrc_mode(&gt->uc.guc.slpc);
-
-err_gucrc:
intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL);
intel_engine_pm_put(stream->engine);
@@ -4251,7 +4192,7 @@ static int read_properties_unlocked(struct i915_perf *perf,
* C6 disable in BIOS. Fail if Media C6 is enabled on steppings where OAM
* does not work as expected.
*/
- if (IS_MTL_MEDIA_STEP(props->engine->i915, STEP_A0, STEP_C0) &&
+ if (IS_MEDIA_GT_IP_STEP(props->engine->gt, IP_VER(13, 0), STEP_A0, STEP_C0) &&
props->engine->oa_group->type == TYPE_OAM &&
intel_check_bios_c6_setup(&props->engine->gt->rc6)) {
drm_dbg(&perf->i915->drm,
@@ -4564,7 +4505,7 @@ static bool xehp_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr)
static bool gen12_is_valid_mux_addr(struct i915_perf *perf, u32 addr)
{
- if (IS_METEORLAKE(perf->i915))
+ if (GRAPHICS_VER_FULL(perf->i915) >= IP_VER(12, 70))
return reg_in_range_table(addr, mtl_oa_mux_regs);
else
return reg_in_range_table(addr, gen12_oa_mux_regs);
@@ -4915,7 +4856,6 @@ static struct ctl_table oa_table[] = {
.extra1 = SYSCTL_ZERO,
.extra2 = &oa_sample_rate_hard_limit,
},
- {}
};
static u32 num_perf_groups_per_gt(struct intel_gt *gt)
@@ -5352,16 +5292,9 @@ int i915_perf_ioctl_version(struct drm_i915_private *i915)
* C6 disable in BIOS. If Media C6 is enabled in BIOS, return version 6
* to indicate that OA media is not supported.
*/
- if (IS_MTL_MEDIA_STEP(i915, STEP_A0, STEP_C0)) {
- struct intel_gt *gt;
- int i;
-
- for_each_gt(gt, i915, i) {
- if (gt->type == GT_MEDIA &&
- intel_check_bios_c6_setup(&gt->rc6))
- return 6;
- }
- }
+ if (IS_MEDIA_GT_IP_STEP(i915->media_gt, IP_VER(13, 0), STEP_A0, STEP_C0) &&
+ intel_check_bios_c6_setup(&i915->media_gt->rc6))
+ return 6;
return 7;
}