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-rw-r--r--drivers/gpu/drm/solomon/Kconfig12
-rw-r--r--drivers/gpu/drm/solomon/ssd130x-i2c.c18
-rw-r--r--drivers/gpu/drm/solomon/ssd130x-spi.c27
-rw-r--r--drivers/gpu/drm/solomon/ssd130x.c687
-rw-r--r--drivers/gpu/drm/solomon/ssd130x.h21
5 files changed, 645 insertions, 120 deletions
diff --git a/drivers/gpu/drm/solomon/Kconfig b/drivers/gpu/drm/solomon/Kconfig
index e170716d97..c3ee956c2b 100644
--- a/drivers/gpu/drm/solomon/Kconfig
+++ b/drivers/gpu/drm/solomon/Kconfig
@@ -1,31 +1,31 @@
config DRM_SSD130X
- tristate "DRM support for Solomon SSD130x OLED displays"
+ tristate "DRM support for Solomon SSD13xx OLED displays"
depends on DRM && MMU
select BACKLIGHT_CLASS_DEVICE
select DRM_GEM_SHMEM_HELPER
select DRM_KMS_HELPER
help
- DRM driver for the SSD130x Solomon and SINO WEALTH SH110x OLED
+ DRM driver for the SSD13xx Solomon and SINO WEALTH SH110x OLED
controllers. This is only for the core driver, a driver for the
appropriate bus transport in your chip also must be selected.
If M is selected the module will be called ssd130x.
config DRM_SSD130X_I2C
- tristate "DRM support for Solomon SSD130x OLED displays (I2C bus)"
+ tristate "DRM support for Solomon SSD13xx OLED displays (I2C bus)"
depends on DRM_SSD130X && I2C
select REGMAP_I2C
help
- Say Y here if the SSD130x or SH110x OLED display is connected via
+ Say Y here if the SSD13xx or SH110x OLED display is connected via
I2C bus.
If M is selected the module will be called ssd130x-i2c.
config DRM_SSD130X_SPI
- tristate "DRM support for Solomon SSD130X OLED displays (SPI bus)"
+ tristate "DRM support for Solomon SSD13xx OLED displays (SPI bus)"
depends on DRM_SSD130X && SPI
select REGMAP
help
- Say Y here if the SSD130x OLED display is connected via SPI bus.
+ Say Y here if the SSD13xx OLED display is connected via SPI bus.
If M is selected the module will be called ssd130x-spi.
diff --git a/drivers/gpu/drm/solomon/ssd130x-i2c.c b/drivers/gpu/drm/solomon/ssd130x-i2c.c
index b4eb2d64bf..f2ccab9c06 100644
--- a/drivers/gpu/drm/solomon/ssd130x-i2c.c
+++ b/drivers/gpu/drm/solomon/ssd130x-i2c.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * DRM driver for Solomon SSD130x OLED displays (I2C bus)
+ * DRM driver for Solomon SSD13xx OLED displays (I2C bus)
*
* Copyright 2022 Red Hat Inc.
* Author: Javier Martinez Canillas <javierm@redhat.com>
@@ -14,7 +14,7 @@
#include "ssd130x.h"
#define DRIVER_NAME "ssd130x-i2c"
-#define DRIVER_DESC "DRM driver for Solomon SSD130x OLED displays (I2C)"
+#define DRIVER_DESC "DRM driver for Solomon SSD13xx OLED displays (I2C)"
static const struct regmap_config ssd130x_i2c_regmap_config = {
.reg_bits = 8,
@@ -54,6 +54,7 @@ static void ssd130x_i2c_shutdown(struct i2c_client *client)
}
static const struct of_device_id ssd130x_of_match[] = {
+ /* ssd130x family */
{
.compatible = "sinowealth,sh1106",
.data = &ssd130x_variants[SH1106_ID],
@@ -91,6 +92,19 @@ static const struct of_device_id ssd130x_of_match[] = {
.compatible = "solomon,ssd1309fb-i2c",
.data = &ssd130x_variants[SSD1309_ID],
},
+ /* ssd132x family */
+ {
+ .compatible = "solomon,ssd1322",
+ .data = &ssd130x_variants[SSD1322_ID],
+ },
+ {
+ .compatible = "solomon,ssd1325",
+ .data = &ssd130x_variants[SSD1325_ID],
+ },
+ {
+ .compatible = "solomon,ssd1327",
+ .data = &ssd130x_variants[SSD1327_ID],
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ssd130x_of_match);
diff --git a/drivers/gpu/drm/solomon/ssd130x-spi.c b/drivers/gpu/drm/solomon/ssd130x-spi.c
index 19ab4942cb..84e035a7ab 100644
--- a/drivers/gpu/drm/solomon/ssd130x-spi.c
+++ b/drivers/gpu/drm/solomon/ssd130x-spi.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * DRM driver for Solomon SSD130X OLED displays (SPI bus)
+ * DRM driver for Solomon SSD13xx OLED displays (SPI bus)
*
* Copyright 2022 Red Hat Inc.
* Authors: Javier Martinez Canillas <javierm@redhat.com>
@@ -11,7 +11,7 @@
#include "ssd130x.h"
#define DRIVER_NAME "ssd130x-spi"
-#define DRIVER_DESC "DRM driver for Solomon SSD130X OLED displays (SPI)"
+#define DRIVER_DESC "DRM driver for Solomon SSD13xx OLED displays (SPI)"
struct ssd130x_spi_transport {
struct spi_device *spi;
@@ -34,10 +34,10 @@ static int ssd130x_spi_write(void *context, const void *data, size_t count)
struct spi_device *spi = t->spi;
const u8 *reg = data;
- if (*reg == SSD130X_COMMAND)
+ if (*reg == SSD13XX_COMMAND)
gpiod_set_value_cansleep(t->dc, 0);
- if (*reg == SSD130X_DATA)
+ if (*reg == SSD13XX_DATA)
gpiod_set_value_cansleep(t->dc, 1);
/* Remove control byte since is not used in a 4-wire SPI interface */
@@ -108,6 +108,7 @@ static void ssd130x_spi_shutdown(struct spi_device *spi)
}
static const struct of_device_id ssd130x_of_match[] = {
+ /* ssd130x family */
{
.compatible = "sinowealth,sh1106",
.data = &ssd130x_variants[SH1106_ID],
@@ -128,6 +129,19 @@ static const struct of_device_id ssd130x_of_match[] = {
.compatible = "solomon,ssd1309",
.data = &ssd130x_variants[SSD1309_ID],
},
+ /* ssd132x family */
+ {
+ .compatible = "solomon,ssd1322",
+ .data = &ssd130x_variants[SSD1322_ID],
+ },
+ {
+ .compatible = "solomon,ssd1325",
+ .data = &ssd130x_variants[SSD1325_ID],
+ },
+ {
+ .compatible = "solomon,ssd1327",
+ .data = &ssd130x_variants[SSD1327_ID],
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ssd130x_of_match);
@@ -142,11 +156,16 @@ MODULE_DEVICE_TABLE(of, ssd130x_of_match);
* not be needed for this driver to match the registered SPI devices.
*/
static const struct spi_device_id ssd130x_spi_table[] = {
+ /* ssd130x family */
{ "sh1106", SH1106_ID },
{ "ssd1305", SSD1305_ID },
{ "ssd1306", SSD1306_ID },
{ "ssd1307", SSD1307_ID },
{ "ssd1309", SSD1309_ID },
+ /* ssd132x family */
+ { "ssd1322", SSD1322_ID },
+ { "ssd1325", SSD1325_ID },
+ { "ssd1327", SSD1327_ID },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(spi, ssd130x_spi_table);
diff --git a/drivers/gpu/drm/solomon/ssd130x.c b/drivers/gpu/drm/solomon/ssd130x.c
index 78272b1f9d..e0174f82e3 100644
--- a/drivers/gpu/drm/solomon/ssd130x.c
+++ b/drivers/gpu/drm/solomon/ssd130x.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * DRM driver for Solomon SSD130x OLED displays
+ * DRM driver for Solomon SSD13xx OLED displays
*
* Copyright 2022 Red Hat Inc.
* Author: Javier Martinez Canillas <javierm@redhat.com>
@@ -37,23 +37,33 @@
#include "ssd130x.h"
#define DRIVER_NAME "ssd130x"
-#define DRIVER_DESC "DRM driver for Solomon SSD130x OLED displays"
+#define DRIVER_DESC "DRM driver for Solomon SSD13xx OLED displays"
#define DRIVER_DATE "20220131"
#define DRIVER_MAJOR 1
#define DRIVER_MINOR 0
+#define SSD130X_PAGE_HEIGHT 8
+
+#define SSD132X_SEGMENT_WIDTH 2
+
+/* ssd13xx commands */
+#define SSD13XX_CONTRAST 0x81
+#define SSD13XX_SET_SEG_REMAP 0xa0
+#define SSD13XX_SET_MULTIPLEX_RATIO 0xa8
+#define SSD13XX_DISPLAY_OFF 0xae
+#define SSD13XX_DISPLAY_ON 0xaf
+
+#define SSD13XX_SET_SEG_REMAP_MASK GENMASK(0, 0)
+#define SSD13XX_SET_SEG_REMAP_SET(val) FIELD_PREP(SSD13XX_SET_SEG_REMAP_MASK, (val))
+
+/* ssd130x commands */
#define SSD130X_PAGE_COL_START_LOW 0x00
#define SSD130X_PAGE_COL_START_HIGH 0x10
#define SSD130X_SET_ADDRESS_MODE 0x20
#define SSD130X_SET_COL_RANGE 0x21
#define SSD130X_SET_PAGE_RANGE 0x22
-#define SSD130X_CONTRAST 0x81
#define SSD130X_SET_LOOKUP_TABLE 0x91
#define SSD130X_CHARGE_PUMP 0x8d
-#define SSD130X_SET_SEG_REMAP 0xa0
-#define SSD130X_DISPLAY_OFF 0xae
-#define SSD130X_SET_MULTIPLEX_RATIO 0xa8
-#define SSD130X_DISPLAY_ON 0xaf
#define SSD130X_START_PAGE_ADDRESS 0xb0
#define SSD130X_SET_COM_SCAN_DIR 0xc0
#define SSD130X_SET_DISPLAY_OFFSET 0xd3
@@ -63,13 +73,12 @@
#define SSD130X_SET_COM_PINS_CONFIG 0xda
#define SSD130X_SET_VCOMH 0xdb
+/* ssd130x commands accessors */
#define SSD130X_PAGE_COL_START_MASK GENMASK(3, 0)
#define SSD130X_PAGE_COL_START_HIGH_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val) >> 4)
#define SSD130X_PAGE_COL_START_LOW_SET(val) FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val))
#define SSD130X_START_PAGE_ADDRESS_MASK GENMASK(2, 0)
#define SSD130X_START_PAGE_ADDRESS_SET(val) FIELD_PREP(SSD130X_START_PAGE_ADDRESS_MASK, (val))
-#define SSD130X_SET_SEG_REMAP_MASK GENMASK(0, 0)
-#define SSD130X_SET_SEG_REMAP_SET(val) FIELD_PREP(SSD130X_SET_SEG_REMAP_MASK, (val))
#define SSD130X_SET_COM_SCAN_DIR_MASK GENMASK(3, 3)
#define SSD130X_SET_COM_SCAN_DIR_SET(val) FIELD_PREP(SSD130X_SET_COM_SCAN_DIR_MASK, (val))
#define SSD130X_SET_CLOCK_DIV_MASK GENMASK(3, 0)
@@ -92,6 +101,24 @@
#define SSD130X_SET_AREA_COLOR_MODE_ENABLE 0x1e
#define SSD130X_SET_AREA_COLOR_MODE_LOW_POWER 0x05
+/* ssd132x commands */
+#define SSD132X_SET_COL_RANGE 0x15
+#define SSD132X_SET_DEACTIVATE_SCROLL 0x2e
+#define SSD132X_SET_ROW_RANGE 0x75
+#define SSD132X_SET_DISPLAY_START 0xa1
+#define SSD132X_SET_DISPLAY_OFFSET 0xa2
+#define SSD132X_SET_DISPLAY_NORMAL 0xa4
+#define SSD132X_SET_FUNCTION_SELECT_A 0xab
+#define SSD132X_SET_PHASE_LENGTH 0xb1
+#define SSD132X_SET_CLOCK_FREQ 0xb3
+#define SSD132X_SET_GPIO 0xb5
+#define SSD132X_SET_PRECHARGE_PERIOD 0xb6
+#define SSD132X_SET_GRAY_SCALE_TABLE 0xb8
+#define SSD132X_SELECT_DEFAULT_TABLE 0xb9
+#define SSD132X_SET_PRECHARGE_VOLTAGE 0xbc
+#define SSD130X_SET_VCOMH_VOLTAGE 0xbe
+#define SSD132X_SET_FUNCTION_SELECT_B 0xd5
+
#define MAX_CONTRAST 255
const struct ssd130x_deviceinfo ssd130x_variants[] = {
@@ -102,7 +129,7 @@ const struct ssd130x_deviceinfo ssd130x_variants[] = {
.default_width = 132,
.default_height = 64,
.page_mode_only = 1,
- .page_height = 8,
+ .family_id = SSD130X_FAMILY,
},
[SSD1305_ID] = {
.default_vcomh = 0x34,
@@ -110,7 +137,7 @@ const struct ssd130x_deviceinfo ssd130x_variants[] = {
.default_dclk_frq = 7,
.default_width = 132,
.default_height = 64,
- .page_height = 8,
+ .family_id = SSD130X_FAMILY,
},
[SSD1306_ID] = {
.default_vcomh = 0x20,
@@ -119,7 +146,7 @@ const struct ssd130x_deviceinfo ssd130x_variants[] = {
.need_chargepump = 1,
.default_width = 128,
.default_height = 64,
- .page_height = 8,
+ .family_id = SSD130X_FAMILY,
},
[SSD1307_ID] = {
.default_vcomh = 0x20,
@@ -128,7 +155,7 @@ const struct ssd130x_deviceinfo ssd130x_variants[] = {
.need_pwm = 1,
.default_width = 128,
.default_height = 39,
- .page_height = 8,
+ .family_id = SSD130X_FAMILY,
},
[SSD1309_ID] = {
.default_vcomh = 0x34,
@@ -136,19 +163,44 @@ const struct ssd130x_deviceinfo ssd130x_variants[] = {
.default_dclk_frq = 10,
.default_width = 128,
.default_height = 64,
- .page_height = 8,
+ .family_id = SSD130X_FAMILY,
+ },
+ /* ssd132x family */
+ [SSD1322_ID] = {
+ .default_width = 480,
+ .default_height = 128,
+ .family_id = SSD132X_FAMILY,
+ },
+ [SSD1325_ID] = {
+ .default_width = 128,
+ .default_height = 80,
+ .family_id = SSD132X_FAMILY,
+ },
+ [SSD1327_ID] = {
+ .default_width = 128,
+ .default_height = 128,
+ .family_id = SSD132X_FAMILY,
}
};
EXPORT_SYMBOL_NS_GPL(ssd130x_variants, DRM_SSD130X);
+struct ssd130x_crtc_state {
+ struct drm_crtc_state base;
+ /* Buffer to store pixels in HW format and written to the panel */
+ u8 *data_array;
+};
+
struct ssd130x_plane_state {
struct drm_shadow_plane_state base;
/* Intermediate buffer to convert pixels from XRGB8888 to HW format */
u8 *buffer;
- /* Buffer to store pixels in HW format and written to the panel */
- u8 *data_array;
};
+static inline struct ssd130x_crtc_state *to_ssd130x_crtc_state(struct drm_crtc_state *state)
+{
+ return container_of(state, struct ssd130x_crtc_state, base);
+}
+
static inline struct ssd130x_plane_state *to_ssd130x_plane_state(struct drm_plane_state *state)
{
return container_of(state, struct ssd130x_plane_state, base.base);
@@ -160,20 +212,20 @@ static inline struct ssd130x_device *drm_to_ssd130x(struct drm_device *drm)
}
/*
- * Helper to write data (SSD130X_DATA) to the device.
+ * Helper to write data (SSD13XX_DATA) to the device.
*/
static int ssd130x_write_data(struct ssd130x_device *ssd130x, u8 *values, int count)
{
- return regmap_bulk_write(ssd130x->regmap, SSD130X_DATA, values, count);
+ return regmap_bulk_write(ssd130x->regmap, SSD13XX_DATA, values, count);
}
/*
- * Helper to write command (SSD130X_COMMAND). The fist variadic argument
+ * Helper to write command (SSD13XX_COMMAND). The fist variadic argument
* is the command to write and the following are the command options.
*
- * Note that the ssd130x protocol requires each command and option to be
- * written as a SSD130X_COMMAND device register value. That is why a call
- * to regmap_write(..., SSD130X_COMMAND, ...) is done for each argument.
+ * Note that the ssd13xx protocol requires each command and option to be
+ * written as a SSD13XX_COMMAND device register value. That is why a call
+ * to regmap_write(..., SSD13XX_COMMAND, ...) is done for each argument.
*/
static int ssd130x_write_cmd(struct ssd130x_device *ssd130x, int count,
/* u8 cmd, u8 option, ... */...)
@@ -186,7 +238,7 @@ static int ssd130x_write_cmd(struct ssd130x_device *ssd130x, int count,
do {
value = va_arg(ap, int);
- ret = regmap_write(ssd130x->regmap, SSD130X_COMMAND, value);
+ ret = regmap_write(ssd130x->regmap, SSD13XX_COMMAND, value);
if (ret)
goto out_end;
} while (--count);
@@ -272,8 +324,8 @@ static int ssd130x_pwm_enable(struct ssd130x_device *ssd130x)
/* Enable the PWM */
pwm_enable(ssd130x->pwm);
- dev_dbg(dev, "Using PWM%d with a %lluns period.\n",
- ssd130x->pwm->pwm, pwm_get_period(ssd130x->pwm));
+ dev_dbg(dev, "Using PWM %s with a %lluns period.\n",
+ ssd130x->pwm->label, pwm_get_period(ssd130x->pwm));
return 0;
}
@@ -330,13 +382,13 @@ static int ssd130x_init(struct ssd130x_device *ssd130x)
int ret;
/* Set initial contrast */
- ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CONTRAST, ssd130x->contrast);
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD13XX_CONTRAST, ssd130x->contrast);
if (ret < 0)
return ret;
/* Set segment re-map */
- seg_remap = (SSD130X_SET_SEG_REMAP |
- SSD130X_SET_SEG_REMAP_SET(ssd130x->seg_remap));
+ seg_remap = (SSD13XX_SET_SEG_REMAP |
+ SSD13XX_SET_SEG_REMAP_SET(ssd130x->seg_remap));
ret = ssd130x_write_cmd(ssd130x, 1, seg_remap);
if (ret < 0)
return ret;
@@ -349,7 +401,7 @@ static int ssd130x_init(struct ssd130x_device *ssd130x)
return ret;
/* Set multiplex ratio value */
- ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_MULTIPLEX_RATIO, ssd130x->height - 1);
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD13XX_SET_MULTIPLEX_RATIO, ssd130x->height - 1);
if (ret < 0)
return ret;
@@ -447,24 +499,112 @@ static int ssd130x_init(struct ssd130x_device *ssd130x)
SSD130X_SET_ADDRESS_MODE_HORIZONTAL);
}
+static int ssd132x_init(struct ssd130x_device *ssd130x)
+{
+ int ret;
+
+ /* Set initial contrast */
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD13XX_CONTRAST, 0x80);
+ if (ret < 0)
+ return ret;
+
+ /* Set column start and end */
+ ret = ssd130x_write_cmd(ssd130x, 3, SSD132X_SET_COL_RANGE, 0x00,
+ ssd130x->width / SSD132X_SEGMENT_WIDTH - 1);
+ if (ret < 0)
+ return ret;
+
+ /* Set row start and end */
+ ret = ssd130x_write_cmd(ssd130x, 3, SSD132X_SET_ROW_RANGE, 0x00, ssd130x->height - 1);
+ if (ret < 0)
+ return ret;
+ /*
+ * Horizontal Address Increment
+ * Re-map for Column Address, Nibble and COM
+ * COM Split Odd Even
+ */
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD13XX_SET_SEG_REMAP, 0x53);
+ if (ret < 0)
+ return ret;
+
+ /* Set display start and offset */
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD132X_SET_DISPLAY_START, 0x00);
+ if (ret < 0)
+ return ret;
+
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD132X_SET_DISPLAY_OFFSET, 0x00);
+ if (ret < 0)
+ return ret;
+
+ /* Set display mode normal */
+ ret = ssd130x_write_cmd(ssd130x, 1, SSD132X_SET_DISPLAY_NORMAL);
+ if (ret < 0)
+ return ret;
+
+ /* Set multiplex ratio value */
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD13XX_SET_MULTIPLEX_RATIO, ssd130x->height - 1);
+ if (ret < 0)
+ return ret;
+
+ /* Set phase length */
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD132X_SET_PHASE_LENGTH, 0x55);
+ if (ret < 0)
+ return ret;
+
+ /* Select default linear gray scale table */
+ ret = ssd130x_write_cmd(ssd130x, 1, SSD132X_SELECT_DEFAULT_TABLE);
+ if (ret < 0)
+ return ret;
+
+ /* Set clock frequency */
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD132X_SET_CLOCK_FREQ, 0x01);
+ if (ret < 0)
+ return ret;
+
+ /* Enable internal VDD regulator */
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD132X_SET_FUNCTION_SELECT_A, 0x1);
+ if (ret < 0)
+ return ret;
+
+ /* Set pre-charge period */
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD132X_SET_PRECHARGE_PERIOD, 0x01);
+ if (ret < 0)
+ return ret;
+
+ /* Set pre-charge voltage */
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD132X_SET_PRECHARGE_VOLTAGE, 0x08);
+ if (ret < 0)
+ return ret;
+
+ /* Set VCOMH voltage */
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_VCOMH_VOLTAGE, 0x07);
+ if (ret < 0)
+ return ret;
+
+ /* Enable second pre-charge and internal VSL */
+ ret = ssd130x_write_cmd(ssd130x, 2, SSD132X_SET_FUNCTION_SELECT_B, 0x62);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
static int ssd130x_update_rect(struct ssd130x_device *ssd130x,
- struct ssd130x_plane_state *ssd130x_state,
- struct drm_rect *rect)
+ struct drm_rect *rect, u8 *buf,
+ u8 *data_array)
{
unsigned int x = rect->x1;
unsigned int y = rect->y1;
- u8 *buf = ssd130x_state->buffer;
- u8 *data_array = ssd130x_state->data_array;
unsigned int width = drm_rect_width(rect);
unsigned int height = drm_rect_height(rect);
unsigned int line_length = DIV_ROUND_UP(width, 8);
- unsigned int page_height = ssd130x->device_info->page_height;
+ unsigned int page_height = SSD130X_PAGE_HEIGHT;
unsigned int pages = DIV_ROUND_UP(height, page_height);
struct drm_device *drm = &ssd130x->drm;
u32 array_idx = 0;
int ret, i, j, k;
- drm_WARN_ONCE(drm, y % 8 != 0, "y must be aligned to screen page\n");
+ drm_WARN_ONCE(drm, y % page_height != 0, "y must be aligned to screen page\n");
/*
* The screen is divided in pages, each having a height of 8
@@ -496,27 +636,32 @@ static int ssd130x_update_rect(struct ssd130x_device *ssd130x,
*/
if (!ssd130x->page_address_mode) {
+ u8 page_start;
+
/* Set address range for horizontal addressing mode */
ret = ssd130x_set_col_range(ssd130x, ssd130x->col_offset + x, width);
if (ret < 0)
return ret;
- ret = ssd130x_set_page_range(ssd130x, ssd130x->page_offset + y / 8, pages);
+ page_start = ssd130x->page_offset + y / page_height;
+ ret = ssd130x_set_page_range(ssd130x, page_start, pages);
if (ret < 0)
return ret;
}
for (i = 0; i < pages; i++) {
- int m = 8;
+ int m = page_height;
/* Last page may be partial */
- if (8 * (y / 8 + i + 1) > ssd130x->height)
- m = ssd130x->height % 8;
+ if (page_height * (y / page_height + i + 1) > ssd130x->height)
+ m = ssd130x->height % page_height;
+
for (j = 0; j < width; j++) {
u8 data = 0;
for (k = 0; k < m; k++) {
- u8 byte = buf[(8 * i + k) * line_length + j / 8];
+ u32 idx = (page_height * i + k) * line_length + j / 8;
+ u8 byte = buf[idx];
u8 bit = (byte >> (j % 8)) & 1;
data |= bit << k;
@@ -550,12 +695,67 @@ static int ssd130x_update_rect(struct ssd130x_device *ssd130x,
return ret;
}
-static void ssd130x_clear_screen(struct ssd130x_device *ssd130x,
- struct ssd130x_plane_state *ssd130x_state)
+static int ssd132x_update_rect(struct ssd130x_device *ssd130x,
+ struct drm_rect *rect, u8 *buf,
+ u8 *data_array)
{
- unsigned int page_height = ssd130x->device_info->page_height;
- unsigned int pages = DIV_ROUND_UP(ssd130x->height, page_height);
- u8 *data_array = ssd130x_state->data_array;
+ unsigned int x = rect->x1;
+ unsigned int y = rect->y1;
+ unsigned int segment_width = SSD132X_SEGMENT_WIDTH;
+ unsigned int width = drm_rect_width(rect);
+ unsigned int height = drm_rect_height(rect);
+ unsigned int columns = DIV_ROUND_UP(width, segment_width);
+ unsigned int rows = height;
+ struct drm_device *drm = &ssd130x->drm;
+ u32 array_idx = 0;
+ unsigned int i, j;
+ int ret;
+
+ drm_WARN_ONCE(drm, x % segment_width != 0, "x must be aligned to screen segment\n");
+
+ /*
+ * The screen is divided in Segment and Common outputs, where
+ * COM0 to COM[N - 1] are the rows and SEG0 to SEG[M - 1] are
+ * the columns.
+ *
+ * Each Segment has a 4-bit pixel and each Common output has a
+ * row of pixels. When using the (default) horizontal address
+ * increment mode, each byte of data sent to the controller has
+ * two Segments (e.g: SEG0 and SEG1) that are stored in the lower
+ * and higher nibbles of a single byte representing one column.
+ * That is, the first byte are SEG0 (D0[3:0]) and SEG1 (D0[7:4]),
+ * the second byte are SEG2 (D1[3:0]) and SEG3 (D1[7:4]) and so on.
+ */
+
+ /* Set column start and end */
+ ret = ssd130x_write_cmd(ssd130x, 3, SSD132X_SET_COL_RANGE, x / segment_width, columns - 1);
+ if (ret < 0)
+ return ret;
+
+ /* Set row start and end */
+ ret = ssd130x_write_cmd(ssd130x, 3, SSD132X_SET_ROW_RANGE, y, rows - 1);
+ if (ret < 0)
+ return ret;
+
+ for (i = 0; i < height; i++) {
+ /* Process pair of pixels and combine them into a single byte */
+ for (j = 0; j < width; j += segment_width) {
+ u8 n1 = buf[i * width + j];
+ u8 n2 = buf[i * width + j + 1];
+
+ data_array[array_idx++] = (n2 << 4) | n1;
+ }
+ }
+
+ /* Write out update in one go since horizontal addressing mode is used */
+ ret = ssd130x_write_data(ssd130x, data_array, columns * rows);
+
+ return ret;
+}
+
+static void ssd130x_clear_screen(struct ssd130x_device *ssd130x, u8 *data_array)
+{
+ unsigned int pages = DIV_ROUND_UP(ssd130x->height, SSD130X_PAGE_HEIGHT);
unsigned int width = ssd130x->width;
int ret, i;
@@ -594,22 +794,30 @@ static void ssd130x_clear_screen(struct ssd130x_device *ssd130x,
}
}
-static int ssd130x_fb_blit_rect(struct drm_plane_state *state,
+static void ssd132x_clear_screen(struct ssd130x_device *ssd130x, u8 *data_array)
+{
+ unsigned int columns = DIV_ROUND_UP(ssd130x->height, SSD132X_SEGMENT_WIDTH);
+ unsigned int height = ssd130x->height;
+
+ memset(data_array, 0, columns * height);
+
+ /* Write out update in one go since horizontal addressing mode is used */
+ ssd130x_write_data(ssd130x, data_array, columns * height);
+}
+
+static int ssd130x_fb_blit_rect(struct drm_framebuffer *fb,
const struct iosys_map *vmap,
- struct drm_rect *rect)
+ struct drm_rect *rect,
+ u8 *buf, u8 *data_array)
{
- struct drm_framebuffer *fb = state->fb;
struct ssd130x_device *ssd130x = drm_to_ssd130x(fb->dev);
- unsigned int page_height = ssd130x->device_info->page_height;
- struct ssd130x_plane_state *ssd130x_state = to_ssd130x_plane_state(state);
- u8 *buf = ssd130x_state->buffer;
struct iosys_map dst;
unsigned int dst_pitch;
int ret = 0;
/* Align y to display page boundaries */
- rect->y1 = round_down(rect->y1, page_height);
- rect->y2 = min_t(unsigned int, round_up(rect->y2, page_height), ssd130x->height);
+ rect->y1 = round_down(rect->y1, SSD130X_PAGE_HEIGHT);
+ rect->y2 = min_t(unsigned int, round_up(rect->y2, SSD130X_PAGE_HEIGHT), ssd130x->height);
dst_pitch = DIV_ROUND_UP(drm_rect_width(rect), 8);
@@ -622,27 +830,64 @@ static int ssd130x_fb_blit_rect(struct drm_plane_state *state,
drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE);
- ssd130x_update_rect(ssd130x, ssd130x_state, rect);
+ ssd130x_update_rect(ssd130x, rect, buf, data_array);
+
+ return ret;
+}
+
+static int ssd132x_fb_blit_rect(struct drm_framebuffer *fb,
+ const struct iosys_map *vmap,
+ struct drm_rect *rect, u8 *buf,
+ u8 *data_array)
+{
+ struct ssd130x_device *ssd130x = drm_to_ssd130x(fb->dev);
+ unsigned int dst_pitch = drm_rect_width(rect);
+ struct iosys_map dst;
+ int ret = 0;
+
+ /* Align x to display segment boundaries */
+ rect->x1 = round_down(rect->x1, SSD132X_SEGMENT_WIDTH);
+ rect->x2 = min_t(unsigned int, round_up(rect->x2, SSD132X_SEGMENT_WIDTH),
+ ssd130x->width);
+
+ ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE);
+ if (ret)
+ return ret;
+
+ iosys_map_set_vaddr(&dst, buf);
+ drm_fb_xrgb8888_to_gray8(&dst, &dst_pitch, vmap, fb, rect);
+
+ drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE);
+
+ ssd132x_update_rect(ssd130x, rect, buf, data_array);
return ret;
}
-static int ssd130x_primary_plane_helper_atomic_check(struct drm_plane *plane,
- struct drm_atomic_state *state)
+static int ssd130x_primary_plane_atomic_check(struct drm_plane *plane,
+ struct drm_atomic_state *state)
{
struct drm_device *drm = plane->dev;
struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
struct ssd130x_plane_state *ssd130x_state = to_ssd130x_plane_state(plane_state);
- unsigned int page_height = ssd130x->device_info->page_height;
- unsigned int pages = DIV_ROUND_UP(ssd130x->height, page_height);
+ struct drm_crtc *crtc = plane_state->crtc;
+ struct drm_crtc_state *crtc_state = NULL;
const struct drm_format_info *fi;
unsigned int pitch;
int ret;
- ret = drm_plane_helper_atomic_check(plane, state);
+ if (crtc)
+ crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
+
+ ret = drm_atomic_helper_check_plane_state(plane_state, crtc_state,
+ DRM_PLANE_NO_SCALING,
+ DRM_PLANE_NO_SCALING,
+ false, false);
if (ret)
return ret;
+ else if (!plane_state->visible)
+ return 0;
fi = drm_format_info(DRM_FORMAT_R1);
if (!fi)
@@ -654,23 +899,57 @@ static int ssd130x_primary_plane_helper_atomic_check(struct drm_plane *plane,
if (!ssd130x_state->buffer)
return -ENOMEM;
- ssd130x_state->data_array = kcalloc(ssd130x->width, pages, GFP_KERNEL);
- if (!ssd130x_state->data_array) {
- kfree(ssd130x_state->buffer);
- /* Set to prevent a double free in .atomic_destroy_state() */
- ssd130x_state->buffer = NULL;
+ return 0;
+}
+
+static int ssd132x_primary_plane_atomic_check(struct drm_plane *plane,
+ struct drm_atomic_state *state)
+{
+ struct drm_device *drm = plane->dev;
+ struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
+ struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
+ struct ssd130x_plane_state *ssd130x_state = to_ssd130x_plane_state(plane_state);
+ struct drm_crtc *crtc = plane_state->crtc;
+ struct drm_crtc_state *crtc_state = NULL;
+ const struct drm_format_info *fi;
+ unsigned int pitch;
+ int ret;
+
+ if (crtc)
+ crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
+
+ ret = drm_atomic_helper_check_plane_state(plane_state, crtc_state,
+ DRM_PLANE_NO_SCALING,
+ DRM_PLANE_NO_SCALING,
+ false, false);
+ if (ret)
+ return ret;
+ else if (!plane_state->visible)
+ return 0;
+
+ fi = drm_format_info(DRM_FORMAT_R8);
+ if (!fi)
+ return -EINVAL;
+
+ pitch = drm_format_info_min_pitch(fi, 0, ssd130x->width);
+
+ ssd130x_state->buffer = kcalloc(pitch, ssd130x->height, GFP_KERNEL);
+ if (!ssd130x_state->buffer)
return -ENOMEM;
- }
return 0;
}
-static void ssd130x_primary_plane_helper_atomic_update(struct drm_plane *plane,
- struct drm_atomic_state *state)
+static void ssd130x_primary_plane_atomic_update(struct drm_plane *plane,
+ struct drm_atomic_state *state)
{
struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);
+ struct ssd130x_crtc_state *ssd130x_crtc_state = to_ssd130x_crtc_state(crtc_state);
+ struct ssd130x_plane_state *ssd130x_plane_state = to_ssd130x_plane_state(plane_state);
+ struct drm_framebuffer *fb = plane_state->fb;
struct drm_atomic_helper_damage_iter iter;
struct drm_device *drm = plane->dev;
struct drm_rect dst_clip;
@@ -687,24 +966,92 @@ static void ssd130x_primary_plane_helper_atomic_update(struct drm_plane *plane,
if (!drm_rect_intersect(&dst_clip, &damage))
continue;
- ssd130x_fb_blit_rect(plane_state, &shadow_plane_state->data[0], &dst_clip);
+ ssd130x_fb_blit_rect(fb, &shadow_plane_state->data[0], &dst_clip,
+ ssd130x_plane_state->buffer,
+ ssd130x_crtc_state->data_array);
}
drm_dev_exit(idx);
}
-static void ssd130x_primary_plane_helper_atomic_disable(struct drm_plane *plane,
- struct drm_atomic_state *state)
+static void ssd132x_primary_plane_atomic_update(struct drm_plane *plane,
+ struct drm_atomic_state *state)
+{
+ struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
+ struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
+ struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);
+ struct ssd130x_crtc_state *ssd130x_crtc_state = to_ssd130x_crtc_state(crtc_state);
+ struct ssd130x_plane_state *ssd130x_plane_state = to_ssd130x_plane_state(plane_state);
+ struct drm_framebuffer *fb = plane_state->fb;
+ struct drm_atomic_helper_damage_iter iter;
+ struct drm_device *drm = plane->dev;
+ struct drm_rect dst_clip;
+ struct drm_rect damage;
+ int idx;
+
+ if (!drm_dev_enter(drm, &idx))
+ return;
+
+ drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state);
+ drm_atomic_for_each_plane_damage(&iter, &damage) {
+ dst_clip = plane_state->dst;
+
+ if (!drm_rect_intersect(&dst_clip, &damage))
+ continue;
+
+ ssd132x_fb_blit_rect(fb, &shadow_plane_state->data[0], &dst_clip,
+ ssd130x_plane_state->buffer,
+ ssd130x_crtc_state->data_array);
+ }
+
+ drm_dev_exit(idx);
+}
+
+static void ssd130x_primary_plane_atomic_disable(struct drm_plane *plane,
+ struct drm_atomic_state *state)
+{
+ struct drm_device *drm = plane->dev;
+ struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
+ struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
+ struct drm_crtc_state *crtc_state;
+ struct ssd130x_crtc_state *ssd130x_crtc_state;
+ int idx;
+
+ if (!plane_state->crtc)
+ return;
+
+ crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);
+ ssd130x_crtc_state = to_ssd130x_crtc_state(crtc_state);
+
+ if (!drm_dev_enter(drm, &idx))
+ return;
+
+ ssd130x_clear_screen(ssd130x, ssd130x_crtc_state->data_array);
+
+ drm_dev_exit(idx);
+}
+
+static void ssd132x_primary_plane_atomic_disable(struct drm_plane *plane,
+ struct drm_atomic_state *state)
{
struct drm_device *drm = plane->dev;
struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
- struct ssd130x_plane_state *ssd130x_state = to_ssd130x_plane_state(plane->state);
+ struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
+ struct drm_crtc_state *crtc_state;
+ struct ssd130x_crtc_state *ssd130x_crtc_state;
int idx;
+ if (!plane_state->crtc)
+ return;
+
+ crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc);
+ ssd130x_crtc_state = to_ssd130x_crtc_state(crtc_state);
+
if (!drm_dev_enter(drm, &idx))
return;
- ssd130x_clear_screen(ssd130x, ssd130x_state);
+ ssd132x_clear_screen(ssd130x, ssd130x_crtc_state->data_array);
drm_dev_exit(idx);
}
@@ -737,9 +1084,8 @@ static struct drm_plane_state *ssd130x_primary_plane_duplicate_state(struct drm_
if (!ssd130x_state)
return NULL;
- /* The buffers are not duplicated and are allocated in .atomic_check */
+ /* The buffer is not duplicated and is allocated in .atomic_check */
ssd130x_state->buffer = NULL;
- ssd130x_state->data_array = NULL;
new_shadow_plane_state = &ssd130x_state->base;
@@ -753,7 +1099,6 @@ static void ssd130x_primary_plane_destroy_state(struct drm_plane *plane,
{
struct ssd130x_plane_state *ssd130x_state = to_ssd130x_plane_state(state);
- kfree(ssd130x_state->data_array);
kfree(ssd130x_state->buffer);
__drm_gem_destroy_shadow_plane_state(&ssd130x_state->base);
@@ -761,11 +1106,19 @@ static void ssd130x_primary_plane_destroy_state(struct drm_plane *plane,
kfree(ssd130x_state);
}
-static const struct drm_plane_helper_funcs ssd130x_primary_plane_helper_funcs = {
- DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
- .atomic_check = ssd130x_primary_plane_helper_atomic_check,
- .atomic_update = ssd130x_primary_plane_helper_atomic_update,
- .atomic_disable = ssd130x_primary_plane_helper_atomic_disable,
+static const struct drm_plane_helper_funcs ssd130x_primary_plane_helper_funcs[] = {
+ [SSD130X_FAMILY] = {
+ DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
+ .atomic_check = ssd130x_primary_plane_atomic_check,
+ .atomic_update = ssd130x_primary_plane_atomic_update,
+ .atomic_disable = ssd130x_primary_plane_atomic_disable,
+ },
+ [SSD132X_FAMILY] = {
+ DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
+ .atomic_check = ssd132x_primary_plane_atomic_check,
+ .atomic_update = ssd132x_primary_plane_atomic_update,
+ .atomic_disable = ssd132x_primary_plane_atomic_disable,
+ }
};
static const struct drm_plane_funcs ssd130x_primary_plane_funcs = {
@@ -777,8 +1130,8 @@ static const struct drm_plane_funcs ssd130x_primary_plane_funcs = {
.destroy = drm_plane_cleanup,
};
-static enum drm_mode_status ssd130x_crtc_helper_mode_valid(struct drm_crtc *crtc,
- const struct drm_display_mode *mode)
+static enum drm_mode_status ssd130x_crtc_mode_valid(struct drm_crtc *crtc,
+ const struct drm_display_mode *mode)
{
struct ssd130x_device *ssd130x = drm_to_ssd130x(crtc->dev);
@@ -793,27 +1146,122 @@ static enum drm_mode_status ssd130x_crtc_helper_mode_valid(struct drm_crtc *crtc
return MODE_OK;
}
+static int ssd130x_crtc_atomic_check(struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
+{
+ struct drm_device *drm = crtc->dev;
+ struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
+ struct ssd130x_crtc_state *ssd130x_state = to_ssd130x_crtc_state(crtc_state);
+ unsigned int pages = DIV_ROUND_UP(ssd130x->height, SSD130X_PAGE_HEIGHT);
+ int ret;
+
+ ret = drm_crtc_helper_atomic_check(crtc, state);
+ if (ret)
+ return ret;
+
+ ssd130x_state->data_array = kmalloc(ssd130x->width * pages, GFP_KERNEL);
+ if (!ssd130x_state->data_array)
+ return -ENOMEM;
+
+ return 0;
+}
+
+static int ssd132x_crtc_atomic_check(struct drm_crtc *crtc,
+ struct drm_atomic_state *state)
+{
+ struct drm_device *drm = crtc->dev;
+ struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
+ struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
+ struct ssd130x_crtc_state *ssd130x_state = to_ssd130x_crtc_state(crtc_state);
+ unsigned int columns = DIV_ROUND_UP(ssd130x->width, SSD132X_SEGMENT_WIDTH);
+ int ret;
+
+ ret = drm_crtc_helper_atomic_check(crtc, state);
+ if (ret)
+ return ret;
+
+ ssd130x_state->data_array = kmalloc(columns * ssd130x->height, GFP_KERNEL);
+ if (!ssd130x_state->data_array)
+ return -ENOMEM;
+
+ return 0;
+}
+
+/* Called during init to allocate the CRTC's atomic state. */
+static void ssd130x_crtc_reset(struct drm_crtc *crtc)
+{
+ struct ssd130x_crtc_state *ssd130x_state;
+
+ WARN_ON(crtc->state);
+
+ ssd130x_state = kzalloc(sizeof(*ssd130x_state), GFP_KERNEL);
+ if (!ssd130x_state)
+ return;
+
+ __drm_atomic_helper_crtc_reset(crtc, &ssd130x_state->base);
+}
+
+static struct drm_crtc_state *ssd130x_crtc_duplicate_state(struct drm_crtc *crtc)
+{
+ struct ssd130x_crtc_state *old_ssd130x_state;
+ struct ssd130x_crtc_state *ssd130x_state;
+
+ if (WARN_ON(!crtc->state))
+ return NULL;
+
+ old_ssd130x_state = to_ssd130x_crtc_state(crtc->state);
+ ssd130x_state = kmemdup(old_ssd130x_state, sizeof(*ssd130x_state), GFP_KERNEL);
+ if (!ssd130x_state)
+ return NULL;
+
+ /* The buffer is not duplicated and is allocated in .atomic_check */
+ ssd130x_state->data_array = NULL;
+
+ __drm_atomic_helper_crtc_duplicate_state(crtc, &ssd130x_state->base);
+
+ return &ssd130x_state->base;
+}
+
+static void ssd130x_crtc_destroy_state(struct drm_crtc *crtc,
+ struct drm_crtc_state *state)
+{
+ struct ssd130x_crtc_state *ssd130x_state = to_ssd130x_crtc_state(state);
+
+ kfree(ssd130x_state->data_array);
+
+ __drm_atomic_helper_crtc_destroy_state(state);
+
+ kfree(ssd130x_state);
+}
+
/*
* The CRTC is always enabled. Screen updates are performed by
* the primary plane's atomic_update function. Disabling clears
* the screen in the primary plane's atomic_disable function.
*/
-static const struct drm_crtc_helper_funcs ssd130x_crtc_helper_funcs = {
- .mode_valid = ssd130x_crtc_helper_mode_valid,
- .atomic_check = drm_crtc_helper_atomic_check,
+static const struct drm_crtc_helper_funcs ssd130x_crtc_helper_funcs[] = {
+ [SSD130X_FAMILY] = {
+ .mode_valid = ssd130x_crtc_mode_valid,
+ .atomic_check = ssd130x_crtc_atomic_check,
+ },
+ [SSD132X_FAMILY] = {
+ .mode_valid = ssd130x_crtc_mode_valid,
+ .atomic_check = ssd132x_crtc_atomic_check,
+ },
};
static const struct drm_crtc_funcs ssd130x_crtc_funcs = {
- .reset = drm_atomic_helper_crtc_reset,
+ .reset = ssd130x_crtc_reset,
.destroy = drm_crtc_cleanup,
.set_config = drm_atomic_helper_set_config,
.page_flip = drm_atomic_helper_page_flip,
- .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
- .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
+ .atomic_duplicate_state = ssd130x_crtc_duplicate_state,
+ .atomic_destroy_state = ssd130x_crtc_destroy_state,
};
-static void ssd130x_encoder_helper_atomic_enable(struct drm_encoder *encoder,
- struct drm_atomic_state *state)
+static void ssd130x_encoder_atomic_enable(struct drm_encoder *encoder,
+ struct drm_atomic_state *state)
{
struct drm_device *drm = encoder->dev;
struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
@@ -827,7 +1275,7 @@ static void ssd130x_encoder_helper_atomic_enable(struct drm_encoder *encoder,
if (ret)
goto power_off;
- ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_ON);
+ ssd130x_write_cmd(ssd130x, 1, SSD13XX_DISPLAY_ON);
backlight_enable(ssd130x->bl_dev);
@@ -838,29 +1286,60 @@ power_off:
return;
}
-static void ssd130x_encoder_helper_atomic_disable(struct drm_encoder *encoder,
- struct drm_atomic_state *state)
+static void ssd132x_encoder_atomic_enable(struct drm_encoder *encoder,
+ struct drm_atomic_state *state)
+{
+ struct drm_device *drm = encoder->dev;
+ struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
+ int ret;
+
+ ret = ssd130x_power_on(ssd130x);
+ if (ret)
+ return;
+
+ ret = ssd132x_init(ssd130x);
+ if (ret)
+ goto power_off;
+
+ ssd130x_write_cmd(ssd130x, 1, SSD13XX_DISPLAY_ON);
+
+ backlight_enable(ssd130x->bl_dev);
+
+ return;
+
+power_off:
+ ssd130x_power_off(ssd130x);
+}
+
+static void ssd130x_encoder_atomic_disable(struct drm_encoder *encoder,
+ struct drm_atomic_state *state)
{
struct drm_device *drm = encoder->dev;
struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
backlight_disable(ssd130x->bl_dev);
- ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_OFF);
+ ssd130x_write_cmd(ssd130x, 1, SSD13XX_DISPLAY_OFF);
ssd130x_power_off(ssd130x);
}
-static const struct drm_encoder_helper_funcs ssd130x_encoder_helper_funcs = {
- .atomic_enable = ssd130x_encoder_helper_atomic_enable,
- .atomic_disable = ssd130x_encoder_helper_atomic_disable,
+static const struct drm_encoder_helper_funcs ssd130x_encoder_helper_funcs[] = {
+ [SSD130X_FAMILY] = {
+ .atomic_enable = ssd130x_encoder_atomic_enable,
+ .atomic_disable = ssd130x_encoder_atomic_disable,
+ },
+ [SSD132X_FAMILY] = {
+ .atomic_enable = ssd132x_encoder_atomic_enable,
+ .atomic_disable = ssd130x_encoder_atomic_disable,
+ }
};
static const struct drm_encoder_funcs ssd130x_encoder_funcs = {
.destroy = drm_encoder_cleanup,
};
-static int ssd130x_connector_helper_get_modes(struct drm_connector *connector)
+static int ssd130x_connector_get_modes(struct drm_connector *connector)
{
struct ssd130x_device *ssd130x = drm_to_ssd130x(connector->dev);
struct drm_display_mode *mode;
@@ -880,7 +1359,7 @@ static int ssd130x_connector_helper_get_modes(struct drm_connector *connector)
}
static const struct drm_connector_helper_funcs ssd130x_connector_helper_funcs = {
- .get_modes = ssd130x_connector_helper_get_modes,
+ .get_modes = ssd130x_connector_get_modes,
};
static const struct drm_connector_funcs ssd130x_connector_funcs = {
@@ -922,7 +1401,7 @@ static int ssd130x_update_bl(struct backlight_device *bdev)
ssd130x->contrast = brightness;
- ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_CONTRAST);
+ ret = ssd130x_write_cmd(ssd130x, 1, SSD13XX_CONTRAST);
if (ret < 0)
return ret;
@@ -987,6 +1466,7 @@ static void ssd130x_parse_properties(struct ssd130x_device *ssd130x)
static int ssd130x_init_modeset(struct ssd130x_device *ssd130x)
{
+ enum ssd130x_family_ids family_id = ssd130x->device_info->family_id;
struct drm_display_mode *mode = &ssd130x->mode;
struct device *dev = ssd130x->dev;
struct drm_device *drm = &ssd130x->drm;
@@ -1037,7 +1517,7 @@ static int ssd130x_init_modeset(struct ssd130x_device *ssd130x)
return ret;
}
- drm_plane_helper_add(primary_plane, &ssd130x_primary_plane_helper_funcs);
+ drm_plane_helper_add(primary_plane, &ssd130x_primary_plane_helper_funcs[family_id]);
drm_plane_enable_fb_damage_clips(primary_plane);
@@ -1051,7 +1531,7 @@ static int ssd130x_init_modeset(struct ssd130x_device *ssd130x)
return ret;
}
- drm_crtc_helper_add(crtc, &ssd130x_crtc_helper_funcs);
+ drm_crtc_helper_add(crtc, &ssd130x_crtc_helper_funcs[family_id]);
/* Encoder */
@@ -1063,7 +1543,7 @@ static int ssd130x_init_modeset(struct ssd130x_device *ssd130x)
return ret;
}
- drm_encoder_helper_add(encoder, &ssd130x_encoder_helper_funcs);
+ drm_encoder_helper_add(encoder, &ssd130x_encoder_helper_funcs[family_id]);
encoder->possible_crtcs = drm_crtc_mask(crtc);
@@ -1162,6 +1642,7 @@ EXPORT_SYMBOL_GPL(ssd130x_probe);
void ssd130x_remove(struct ssd130x_device *ssd130x)
{
drm_dev_unplug(&ssd130x->drm);
+ drm_atomic_helper_shutdown(&ssd130x->drm);
}
EXPORT_SYMBOL_GPL(ssd130x_remove);
diff --git a/drivers/gpu/drm/solomon/ssd130x.h b/drivers/gpu/drm/solomon/ssd130x.h
index 87968b3e7f..acf7cedf0c 100644
--- a/drivers/gpu/drm/solomon/ssd130x.h
+++ b/drivers/gpu/drm/solomon/ssd130x.h
@@ -21,15 +21,25 @@
#include <linux/regmap.h>
-#define SSD130X_DATA 0x40
-#define SSD130X_COMMAND 0x80
+#define SSD13XX_DATA 0x40
+#define SSD13XX_COMMAND 0x80
+
+enum ssd130x_family_ids {
+ SSD130X_FAMILY,
+ SSD132X_FAMILY
+};
enum ssd130x_variants {
+ /* ssd130x family */
SH1106_ID,
SSD1305_ID,
SSD1306_ID,
SSD1307_ID,
SSD1309_ID,
+ /* ssd132x family */
+ SSD1322_ID,
+ SSD1325_ID,
+ SSD1327_ID,
NR_SSD130X_VARIANTS
};
@@ -39,10 +49,11 @@ struct ssd130x_deviceinfo {
u32 default_dclk_frq;
u32 default_width;
u32 default_height;
- u32 page_height;
- int need_pwm;
- int need_chargepump;
+ bool need_pwm;
+ bool need_chargepump;
bool page_mode_only;
+
+ enum ssd130x_family_ids family_id;
};
struct ssd130x_device {