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Diffstat (limited to 'sound/soc/codecs/cs35l56-shared.c')
-rw-r--r--sound/soc/codecs/cs35l56-shared.c102
1 files changed, 25 insertions, 77 deletions
diff --git a/sound/soc/codecs/cs35l56-shared.c b/sound/soc/codecs/cs35l56-shared.c
index f609cade80..56cd60d33a 100644
--- a/sound/soc/codecs/cs35l56-shared.c
+++ b/sound/soc/codecs/cs35l56-shared.c
@@ -20,10 +20,23 @@ static const struct reg_sequence cs35l56_patch[] = {
* Firmware can change these to non-defaults to satisfy SDCA.
* Ensure that they are at known defaults.
*/
+ { CS35L56_ASP1_ENABLES1, 0x00000000 },
+ { CS35L56_ASP1_CONTROL1, 0x00000028 },
+ { CS35L56_ASP1_CONTROL2, 0x18180200 },
+ { CS35L56_ASP1_CONTROL3, 0x00000002 },
+ { CS35L56_ASP1_FRAME_CONTROL1, 0x03020100 },
+ { CS35L56_ASP1_FRAME_CONTROL5, 0x00020100 },
+ { CS35L56_ASP1_DATA_CONTROL1, 0x00000018 },
+ { CS35L56_ASP1_DATA_CONTROL5, 0x00000018 },
+ { CS35L56_ASP1TX1_INPUT, 0x00000000 },
+ { CS35L56_ASP1TX2_INPUT, 0x00000000 },
+ { CS35L56_ASP1TX3_INPUT, 0x00000000 },
+ { CS35L56_ASP1TX4_INPUT, 0x00000000 },
{ CS35L56_SWIRE_DP3_CH1_INPUT, 0x00000018 },
{ CS35L56_SWIRE_DP3_CH2_INPUT, 0x00000019 },
{ CS35L56_SWIRE_DP3_CH3_INPUT, 0x00000029 },
{ CS35L56_SWIRE_DP3_CH4_INPUT, 0x00000028 },
+ { CS35L56_IRQ1_MASK_18, 0x1f7df0ff },
/* These are not reset by a soft-reset, so patch to defaults. */
{ CS35L56_MAIN_RENDER_USER_MUTE, 0x00000000 },
@@ -41,12 +54,18 @@ EXPORT_SYMBOL_NS_GPL(cs35l56_set_patch, SND_SOC_CS35L56_SHARED);
static const struct reg_default cs35l56_reg_defaults[] = {
/* no defaults for OTP_MEM - first read populates cache */
- /*
- * No defaults for ASP1 control or ASP1TX mixer. See
- * cs35l56_populate_asp1_register_defaults() and
- * cs35l56_sync_asp1_mixer_widgets_with_firmware().
- */
-
+ { CS35L56_ASP1_ENABLES1, 0x00000000 },
+ { CS35L56_ASP1_CONTROL1, 0x00000028 },
+ { CS35L56_ASP1_CONTROL2, 0x18180200 },
+ { CS35L56_ASP1_CONTROL3, 0x00000002 },
+ { CS35L56_ASP1_FRAME_CONTROL1, 0x03020100 },
+ { CS35L56_ASP1_FRAME_CONTROL5, 0x00020100 },
+ { CS35L56_ASP1_DATA_CONTROL1, 0x00000018 },
+ { CS35L56_ASP1_DATA_CONTROL5, 0x00000018 },
+ { CS35L56_ASP1TX1_INPUT, 0x00000000 },
+ { CS35L56_ASP1TX2_INPUT, 0x00000000 },
+ { CS35L56_ASP1TX3_INPUT, 0x00000000 },
+ { CS35L56_ASP1TX4_INPUT, 0x00000000 },
{ CS35L56_SWIRE_DP3_CH1_INPUT, 0x00000018 },
{ CS35L56_SWIRE_DP3_CH2_INPUT, 0x00000019 },
{ CS35L56_SWIRE_DP3_CH3_INPUT, 0x00000029 },
@@ -206,77 +225,6 @@ static bool cs35l56_volatile_reg(struct device *dev, unsigned int reg)
}
}
-static const struct reg_sequence cs35l56_asp1_defaults[] = {
- REG_SEQ0(CS35L56_ASP1_ENABLES1, 0x00000000),
- REG_SEQ0(CS35L56_ASP1_CONTROL1, 0x00000028),
- REG_SEQ0(CS35L56_ASP1_CONTROL2, 0x18180200),
- REG_SEQ0(CS35L56_ASP1_CONTROL3, 0x00000002),
- REG_SEQ0(CS35L56_ASP1_FRAME_CONTROL1, 0x03020100),
- REG_SEQ0(CS35L56_ASP1_FRAME_CONTROL5, 0x00020100),
- REG_SEQ0(CS35L56_ASP1_DATA_CONTROL1, 0x00000018),
- REG_SEQ0(CS35L56_ASP1_DATA_CONTROL5, 0x00000018),
- REG_SEQ0(CS35L56_ASP1TX1_INPUT, 0x00000000),
- REG_SEQ0(CS35L56_ASP1TX2_INPUT, 0x00000000),
- REG_SEQ0(CS35L56_ASP1TX3_INPUT, 0x00000000),
- REG_SEQ0(CS35L56_ASP1TX4_INPUT, 0x00000000),
-};
-
-/*
- * The firmware can have control of the ASP so we don't provide regmap
- * with defaults for these registers, to prevent a regcache_sync() from
- * overwriting the firmware settings. But if the machine driver hooks up
- * the ASP it means the driver is taking control of the ASP, so then the
- * registers are populated with the defaults.
- */
-int cs35l56_init_asp1_regs_for_driver_control(struct cs35l56_base *cs35l56_base)
-{
- if (!cs35l56_base->fw_owns_asp1)
- return 0;
-
- cs35l56_base->fw_owns_asp1 = false;
-
- return regmap_multi_reg_write(cs35l56_base->regmap, cs35l56_asp1_defaults,
- ARRAY_SIZE(cs35l56_asp1_defaults));
-}
-EXPORT_SYMBOL_NS_GPL(cs35l56_init_asp1_regs_for_driver_control, SND_SOC_CS35L56_SHARED);
-
-/*
- * The firmware boot sequence can overwrite the ASP1 config registers so that
- * they don't match regmap's view of their values. Rewrite the values from the
- * regmap cache into the hardware registers.
- */
-int cs35l56_force_sync_asp1_registers_from_cache(struct cs35l56_base *cs35l56_base)
-{
- struct reg_sequence asp1_regs[ARRAY_SIZE(cs35l56_asp1_defaults)];
- int i, ret;
-
- if (cs35l56_base->fw_owns_asp1)
- return 0;
-
- memcpy(asp1_regs, cs35l56_asp1_defaults, sizeof(asp1_regs));
-
- /* Read current values from regmap cache into the write sequence */
- for (i = 0; i < ARRAY_SIZE(asp1_regs); ++i) {
- ret = regmap_read(cs35l56_base->regmap, asp1_regs[i].reg, &asp1_regs[i].def);
- if (ret)
- goto err;
- }
-
- /* Write the values cache-bypassed so that they will be written to silicon */
- ret = regmap_multi_reg_write_bypassed(cs35l56_base->regmap, asp1_regs,
- ARRAY_SIZE(asp1_regs));
- if (ret)
- goto err;
-
- return 0;
-
-err:
- dev_err(cs35l56_base->dev, "Failed to sync ASP1 registers: %d\n", ret);
-
- return ret;
-}
-EXPORT_SYMBOL_NS_GPL(cs35l56_force_sync_asp1_registers_from_cache, SND_SOC_CS35L56_SHARED);
-
int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command)
{
unsigned int val;