From 50ba0232fd5312410f1b65247e774244f89a628e Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sat, 18 May 2024 20:50:36 +0200 Subject: Merging upstream version 6.8.9. Signed-off-by: Daniel Baumann --- .../fpga/altr,socfpga-hps2fpga-bridge.yaml | 49 ++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/fpga/altr,socfpga-hps2fpga-bridge.yaml (limited to 'Documentation/devicetree/bindings/fpga/altr,socfpga-hps2fpga-bridge.yaml') diff --git a/Documentation/devicetree/bindings/fpga/altr,socfpga-hps2fpga-bridge.yaml b/Documentation/devicetree/bindings/fpga/altr,socfpga-hps2fpga-bridge.yaml new file mode 100644 index 0000000000..d19c6660d6 --- /dev/null +++ b/Documentation/devicetree/bindings/fpga/altr,socfpga-hps2fpga-bridge.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fpga/altr,socfpga-hps2fpga-bridge.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Altera FPGA/HPS Bridge + +maintainers: + - Xu Yilun + +allOf: + - $ref: fpga-bridge.yaml# + +properties: + compatible: + enum: + - altr,socfpga-lwhps2fpga-bridge + - altr,socfpga-hps2fpga-bridge + - altr,socfpga-fpga2hps-bridge + + reg: + maxItems: 1 + + resets: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - resets + +unevaluatedProperties: false + +examples: + - | + #include + + fpga-bridge@ff400000 { + compatible = "altr,socfpga-lwhps2fpga-bridge"; + reg = <0xff400000 0x100000>; + bridge-enable = <0>; + clocks = <&l4_main_clk>; + resets = <&rst LWHPS2FPGA_RESET>; + }; -- cgit v1.2.3