From ace9429bb58fd418f0c81d4c2835699bddf6bde6 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Thu, 11 Apr 2024 10:27:49 +0200 Subject: Adding upstream version 6.6.15. Signed-off-by: Daniel Baumann --- .../arm/boot/dts/nxp/imx/imx6ull-phytec-segin.dtsi | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/imx/imx6ull-phytec-segin.dtsi (limited to 'arch/arm/boot/dts/nxp/imx/imx6ull-phytec-segin.dtsi') diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-segin.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-segin.dtsi new file mode 100644 index 0000000000..e287a0453b --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-segin.dtsi @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2019 PHYTEC Messtechnik GmbH + * Author: Stefan Riedmueller + */ + +#include "imx6ul-phytec-segin.dtsi" + +/ { + model = "PHYTEC phyBOARD-Segin i.MX6 ULL"; + compatible = "phytec,imx6ull-pbacd-10", "phytec,imx6ull-pcl063","fsl,imx6ull"; +}; + +&iomuxc { + /delete-node/ flexcan1engrp; + /delete-node/ rtcintgrp; +}; + +&iomuxc_snvs { + princtrl_flexcan1_en: flexcan1engrp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x17059 + >; + }; + + pinctrl_rtc_int: rtcintgrp { + fsl,pins = < + MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x17059 + >; + }; +}; -- cgit v1.2.3