From ace9429bb58fd418f0c81d4c2835699bddf6bde6 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Thu, 11 Apr 2024 10:27:49 +0200 Subject: Adding upstream version 6.6.15. Signed-off-by: Daniel Baumann --- arch/arm64/boot/dts/renesas/r8a77965-ulcb.dts | 33 +++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8a77965-ulcb.dts (limited to 'arch/arm64/boot/dts/renesas/r8a77965-ulcb.dts') diff --git a/arch/arm64/boot/dts/renesas/r8a77965-ulcb.dts b/arch/arm64/boot/dts/renesas/r8a77965-ulcb.dts new file mode 100644 index 0000000000..71704b67a2 --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a77965-ulcb.dts @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the M3NULCB (R-Car Starter Kit Pro) board with R-Car M3-N + * + * Copyright (C) 2018 Renesas Electronics Corp. + * Copyright (C) 2018 Cogent Embedded, Inc. + */ + +/dts-v1/; +#include "r8a77965.dtsi" +#include "ulcb.dtsi" + +/ { + model = "Renesas M3NULCB board based on r8a77965"; + compatible = "renesas,m3nulcb", "renesas,r8a77965"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; +}; + +&du { + clocks = <&cpg CPG_MOD 724>, + <&cpg CPG_MOD 723>, + <&cpg CPG_MOD 721>, + <&versaclock5 1>, + <&versaclock5 3>, + <&versaclock5 2>; + clock-names = "du.0", "du.1", "du.3", + "dclkin.0", "dclkin.1", "dclkin.3"; +}; -- cgit v1.2.3