From e54def4ad8144ab15f826416e2e0f290ef1901b4 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Wed, 19 Jun 2024 23:00:30 +0200 Subject: Adding upstream version 6.9.2. Signed-off-by: Daniel Baumann --- drivers/gpu/drm/i915/gvt/gvt.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'drivers/gpu/drm/i915/gvt/gvt.h') diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h index c57aba0909..2c95aeef4e 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.h +++ b/drivers/gpu/drm/i915/gvt/gvt.h @@ -89,7 +89,6 @@ struct intel_vgpu_gm { /* Fences owned by a vGPU */ struct intel_vgpu_fence { struct i915_fence_reg *regs[INTEL_GVT_MAX_NUM_FENCES]; - u32 base; u32 size; }; @@ -119,7 +118,6 @@ struct intel_vgpu_irq { }; struct intel_vgpu_opregion { - bool mapped; void *va; u32 gfn[INTEL_GVT_OPREGION_PAGES]; }; @@ -223,7 +221,6 @@ struct intel_vgpu { struct vfio_region *region; int num_regions; - struct eventfd_ctx *intx_trigger; struct eventfd_ctx *msi_trigger; /* @@ -256,7 +253,6 @@ struct intel_gvt_fence { /* Special MMIO blocks. */ struct gvt_mmio_block { - unsigned int device; i915_reg_t offset; unsigned int size; gvt_mmio_func read; @@ -444,7 +440,6 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt); #define vgpu_hidden_gmadr_end(vgpu) \ (vgpu_hidden_gmadr_base(vgpu) + vgpu_hidden_sz(vgpu) - 1) -#define vgpu_fence_base(vgpu) (vgpu->fence.base) #define vgpu_fence_sz(vgpu) (vgpu->fence.size) /* ring context size i.e. the first 0x50 dwords*/ -- cgit v1.2.3