From 9f0fc191371843c4fc000a226b0a26b6c059aacd Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sat, 18 May 2024 19:40:19 +0200 Subject: Merging upstream version 6.7.7. Signed-off-by: Daniel Baumann --- drivers/gpu/drm/radeon/atombios.h | 42 ++++++------- drivers/gpu/drm/radeon/pptable.h | 2 +- drivers/gpu/drm/radeon/radeon_bios.c | 20 ++---- drivers/gpu/drm/radeon/radeon_fence.c | 111 ++++++++++++++++------------------ drivers/gpu/drm/radeon/radeon_ttm.c | 2 - 5 files changed, 79 insertions(+), 98 deletions(-) (limited to 'drivers/gpu/drm/radeon') diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h index 8a6621f1e8..2db4078923 100644 --- a/drivers/gpu/drm/radeon/atombios.h +++ b/drivers/gpu/drm/radeon/atombios.h @@ -3893,7 +3893,7 @@ typedef struct _ATOM_GPIO_PIN_ASSIGNMENT typedef struct _ATOM_GPIO_PIN_LUT { ATOM_COMMON_TABLE_HEADER sHeader; - ATOM_GPIO_PIN_ASSIGNMENT asGPIO_Pin[1]; + ATOM_GPIO_PIN_ASSIGNMENT asGPIO_Pin[]; }ATOM_GPIO_PIN_LUT; /****************************************************************************/ @@ -4061,7 +4061,7 @@ typedef struct _ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT //usSrcDstTableOffset UCHAR ucNumberOfSrc; USHORT usSrcObjectID[1]; UCHAR ucNumberOfDst; - USHORT usDstObjectID[1]; + USHORT usDstObjectID[]; }ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT; @@ -4233,7 +4233,7 @@ typedef struct _ATOM_CONNECTOR_DEVICE_TAG_RECORD ATOM_COMMON_RECORD_HEADER sheader; UCHAR ucNumberOfDevice; UCHAR ucReserved; - ATOM_CONNECTOR_DEVICE_TAG asDeviceTag[1]; //This Id is same as "ATOM_DEVICE_XXX_SUPPORT", 1 is only for allocation + ATOM_CONNECTOR_DEVICE_TAG asDeviceTag[]; //This Id is same as "ATOM_DEVICE_XXX_SUPPORT", 1 is only for allocation }ATOM_CONNECTOR_DEVICE_TAG_RECORD; @@ -4293,7 +4293,7 @@ typedef struct _ATOM_OBJECT_GPIO_CNTL_RECORD ATOM_COMMON_RECORD_HEADER sheader; UCHAR ucFlags; // Future expnadibility UCHAR ucNumberOfPins; // Number of GPIO pins used to control the object - ATOM_GPIO_PIN_CONTROL_PAIR asGpio[1]; // the real gpio pin pair determined by number of pins ucNumberOfPins + ATOM_GPIO_PIN_CONTROL_PAIR asGpio[]; // the real gpio pin pair determined by number of pins ucNumberOfPins }ATOM_OBJECT_GPIO_CNTL_RECORD; //Definitions for GPIO pin state @@ -4444,7 +4444,7 @@ typedef struct _ATOM_BRACKET_LAYOUT_RECORD UCHAR ucWidth; UCHAR ucConnNum; UCHAR ucReserved; - ATOM_CONNECTOR_LAYOUT_INFO asConnInfo[1]; + ATOM_CONNECTOR_LAYOUT_INFO asConnInfo[]; }ATOM_BRACKET_LAYOUT_RECORD; /****************************************************************************/ @@ -4600,7 +4600,7 @@ typedef struct _ATOM_I2C_VOLTAGE_OBJECT_V3 UCHAR ucVoltageControlAddress; UCHAR ucVoltageControlOffset; ULONG ulReserved; - VOLTAGE_LUT_ENTRY asVolI2cLut[1]; // end with 0xff + VOLTAGE_LUT_ENTRY asVolI2cLut[]; // end with 0xff }ATOM_I2C_VOLTAGE_OBJECT_V3; // ATOM_I2C_VOLTAGE_OBJECT_V3.ucVoltageControlFlag @@ -4625,7 +4625,7 @@ typedef struct _ATOM_LEAKAGE_VOLTAGE_OBJECT_V3 UCHAR ucLeakageEntryNum; // indicate the entry number of LeakageId/Voltage Lut table UCHAR ucReserved[2]; ULONG ulMaxVoltageLevel; - LEAKAGE_VOLTAGE_LUT_ENTRY_V2 asLeakageIdLut[1]; + LEAKAGE_VOLTAGE_LUT_ENTRY_V2 asLeakageIdLut[]; }ATOM_LEAKAGE_VOLTAGE_OBJECT_V3; @@ -4753,7 +4753,7 @@ typedef struct _ATOM_POWER_SOURCE_INFO { ATOM_COMMON_TABLE_HEADER asHeader; UCHAR asPwrbehave[16]; - ATOM_POWER_SOURCE_OBJECT asPwrObj[1]; + ATOM_POWER_SOURCE_OBJECT asPwrObj[]; }ATOM_POWER_SOURCE_INFO; @@ -5440,7 +5440,7 @@ typedef struct _ATOM_FUSION_SYSTEM_INFO_V2 typedef struct _ATOM_I2C_DATA_RECORD { UCHAR ucNunberOfBytes; //Indicates how many bytes SW needs to write to the external ASIC for one block, besides to "Start" and "Stop" - UCHAR ucI2CData[1]; //I2C data in bytes, should be less than 16 bytes usually + UCHAR ucI2CData[]; //I2C data in bytes, should be less than 16 bytes usually }ATOM_I2C_DATA_RECORD; @@ -5451,14 +5451,14 @@ typedef struct _ATOM_I2C_DEVICE_SETUP_INFO UCHAR ucSSChipID; //SS chip being used UCHAR ucSSChipSlaveAddr; //Slave Address to set up this SS chip UCHAR ucNumOfI2CDataRecords; //number of data block - ATOM_I2C_DATA_RECORD asI2CData[1]; + ATOM_I2C_DATA_RECORD asI2CData[]; }ATOM_I2C_DEVICE_SETUP_INFO; //========================================================================================== typedef struct _ATOM_ASIC_MVDD_INFO { ATOM_COMMON_TABLE_HEADER sHeader; - ATOM_I2C_DEVICE_SETUP_INFO asI2CSetup[1]; + ATOM_I2C_DEVICE_SETUP_INFO asI2CSetup[]; }ATOM_ASIC_MVDD_INFO; //========================================================================================== @@ -5520,7 +5520,7 @@ typedef struct _ATOM_ASIC_INTERNAL_SS_INFO typedef struct _ATOM_ASIC_INTERNAL_SS_INFO_V2 { ATOM_COMMON_TABLE_HEADER sHeader; - ATOM_ASIC_SS_ASSIGNMENT_V2 asSpreadSpectrum[1]; //this is point only. + ATOM_ASIC_SS_ASSIGNMENT_V2 asSpreadSpectrum[]; //this is point only. }ATOM_ASIC_INTERNAL_SS_INFO_V2; typedef struct _ATOM_ASIC_SS_ASSIGNMENT_V3 @@ -5542,7 +5542,7 @@ typedef struct _ATOM_ASIC_SS_ASSIGNMENT_V3 typedef struct _ATOM_ASIC_INTERNAL_SS_INFO_V3 { ATOM_COMMON_TABLE_HEADER sHeader; - ATOM_ASIC_SS_ASSIGNMENT_V3 asSpreadSpectrum[1]; //this is pointer only. + ATOM_ASIC_SS_ASSIGNMENT_V3 asSpreadSpectrum[]; //this is pointer only. }ATOM_ASIC_INTERNAL_SS_INFO_V3; @@ -6282,7 +6282,7 @@ typedef union _ATOM_MEMORY_SETTING_ID_CONFIG_ACCESS typedef struct _ATOM_MEMORY_SETTING_DATA_BLOCK{ ATOM_MEMORY_SETTING_ID_CONFIG_ACCESS ulMemoryID; - ULONG aulMemData[1]; + ULONG aulMemData[]; }ATOM_MEMORY_SETTING_DATA_BLOCK; @@ -7092,7 +7092,7 @@ typedef struct _ATOM_DISP_OUT_INFO_V3 UCHAR ucCoreRefClkSource; // value of CORE_REF_CLK_SOURCE UCHAR ucDispCaps; UCHAR ucReserved[2]; - ASIC_TRANSMITTER_INFO_V2 asTransmitterInfo[1]; // for alligment only + ASIC_TRANSMITTER_INFO_V2 asTransmitterInfo[]; // for alligment only }ATOM_DISP_OUT_INFO_V3; //ucDispCaps @@ -7324,12 +7324,12 @@ typedef struct _CLOCK_CONDITION_SETTING_ENTRY{ USHORT usMaxClockFreq; UCHAR ucEncodeMode; UCHAR ucPhySel; - ULONG ulAnalogSetting[1]; + ULONG ulAnalogSetting[]; }CLOCK_CONDITION_SETTING_ENTRY; typedef struct _CLOCK_CONDITION_SETTING_INFO{ USHORT usEntrySize; - CLOCK_CONDITION_SETTING_ENTRY asClkCondSettingEntry[1]; + CLOCK_CONDITION_SETTING_ENTRY asClkCondSettingEntry[]; }CLOCK_CONDITION_SETTING_INFO; typedef struct _PHY_CONDITION_REG_VAL{ @@ -7346,27 +7346,27 @@ typedef struct _PHY_CONDITION_REG_VAL_V2{ typedef struct _PHY_CONDITION_REG_INFO{ USHORT usRegIndex; USHORT usSize; - PHY_CONDITION_REG_VAL asRegVal[1]; + PHY_CONDITION_REG_VAL asRegVal[]; }PHY_CONDITION_REG_INFO; typedef struct _PHY_CONDITION_REG_INFO_V2{ USHORT usRegIndex; USHORT usSize; - PHY_CONDITION_REG_VAL_V2 asRegVal[1]; + PHY_CONDITION_REG_VAL_V2 asRegVal[]; }PHY_CONDITION_REG_INFO_V2; typedef struct _PHY_ANALOG_SETTING_INFO{ UCHAR ucEncodeMode; UCHAR ucPhySel; USHORT usSize; - PHY_CONDITION_REG_INFO asAnalogSetting[1]; + PHY_CONDITION_REG_INFO asAnalogSetting[]; }PHY_ANALOG_SETTING_INFO; typedef struct _PHY_ANALOG_SETTING_INFO_V2{ UCHAR ucEncodeMode; UCHAR ucPhySel; USHORT usSize; - PHY_CONDITION_REG_INFO_V2 asAnalogSetting[1]; + PHY_CONDITION_REG_INFO_V2 asAnalogSetting[]; }PHY_ANALOG_SETTING_INFO_V2; typedef struct _GFX_HAVESTING_PARAMETERS { diff --git a/drivers/gpu/drm/radeon/pptable.h b/drivers/gpu/drm/radeon/pptable.h index 4c2eec49da..9494722988 100644 --- a/drivers/gpu/drm/radeon/pptable.h +++ b/drivers/gpu/drm/radeon/pptable.h @@ -74,7 +74,7 @@ typedef struct _ATOM_PPLIB_THERMALCONTROLLER typedef struct _ATOM_PPLIB_STATE { UCHAR ucNonClockStateIndex; - UCHAR ucClockStateIndices[1]; // variable-sized + UCHAR ucClockStateIndices[]; // variable-sized } ATOM_PPLIB_STATE; diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c index 63bdc9f6fc..3a8c5199a0 100644 --- a/drivers/gpu/drm/radeon/radeon_bios.c +++ b/drivers/gpu/drm/radeon/radeon_bios.c @@ -199,7 +199,11 @@ static bool radeon_atrm_get_bios(struct radeon_device *rdev) if (rdev->flags & RADEON_IS_IGP) return false; - while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) { + while ((pdev = pci_get_base_class(PCI_BASE_CLASS_DISPLAY, pdev))) { + if ((pdev->class != PCI_CLASS_DISPLAY_VGA << 8) && + (pdev->class != PCI_CLASS_DISPLAY_OTHER << 8)) + continue; + dhandle = ACPI_HANDLE(&pdev->dev); if (!dhandle) continue; @@ -211,20 +215,6 @@ static bool radeon_atrm_get_bios(struct radeon_device *rdev) } } - if (!found) { - while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) { - dhandle = ACPI_HANDLE(&pdev->dev); - if (!dhandle) - continue; - - status = acpi_get_handle(dhandle, "ATRM", &atrm_handle); - if (ACPI_SUCCESS(status)) { - found = true; - break; - } - } - } - if (!found) return false; pci_dev_put(pdev); diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c index 2749dde583..9ebe4a0b9a 100644 --- a/drivers/gpu/drm/radeon/radeon_fence.c +++ b/drivers/gpu/drm/radeon/radeon_fence.c @@ -45,7 +45,6 @@ #include "radeon_trace.h" /* - * Fences * Fences mark an event in the GPUs pipeline and are used * for GPU/CPU synchronization. When the fence is written, * it is expected that all buffers associated with that fence @@ -67,10 +66,10 @@ static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring) { struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; + if (likely(rdev->wb.enabled || !drv->scratch_reg)) { - if (drv->cpu_addr) { + if (drv->cpu_addr) *drv->cpu_addr = cpu_to_le32(seq); - } } else { WREG32(drv->scratch_reg, seq); } @@ -91,11 +90,10 @@ static u32 radeon_fence_read(struct radeon_device *rdev, int ring) u32 seq = 0; if (likely(rdev->wb.enabled || !drv->scratch_reg)) { - if (drv->cpu_addr) { + if (drv->cpu_addr) seq = le32_to_cpu(*drv->cpu_addr); - } else { + else seq = lower_32_bits(atomic64_read(&drv->last_seq)); - } } else { seq = RREG32(drv->scratch_reg); } @@ -139,9 +137,9 @@ int radeon_fence_emit(struct radeon_device *rdev, /* we are protected by the ring emission mutex */ *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL); - if ((*fence) == NULL) { + if ((*fence) == NULL) return -ENOMEM; - } + (*fence)->rdev = rdev; (*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring]; (*fence)->ring = ring; @@ -163,7 +161,8 @@ int radeon_fence_emit(struct radeon_device *rdev, * for the fence locking itself, so unlocked variants are used for * fence_signal, and remove_wait_queue. */ -static int radeon_fence_check_signaled(wait_queue_entry_t *wait, unsigned mode, int flags, void *key) +static int radeon_fence_check_signaled(wait_queue_entry_t *wait, + unsigned int mode, int flags, void *key) { struct radeon_fence *fence; u64 seq; @@ -197,7 +196,7 @@ static int radeon_fence_check_signaled(wait_queue_entry_t *wait, unsigned mode, static bool radeon_fence_activity(struct radeon_device *rdev, int ring) { uint64_t seq, last_seq, last_emitted; - unsigned count_loop = 0; + unsigned int count_loop = 0; bool wake = false; /* Note there is a scenario here for an infinite loop but it's @@ -231,9 +230,9 @@ static bool radeon_fence_activity(struct radeon_device *rdev, int ring) seq |= last_emitted & 0xffffffff00000000LL; } - if (seq <= last_seq || seq > last_emitted) { + if (seq <= last_seq || seq > last_emitted) break; - } + /* If we loop over we don't want to return without * checking if a fence is signaled as it means that the * seq we just read is different from the previous on. @@ -296,8 +295,7 @@ static void radeon_fence_check_lockup(struct work_struct *work) else if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) { /* good news we believe it's a lockup */ - dev_warn(rdev->dev, "GPU lockup (current fence id " - "0x%016llx last fence id 0x%016llx on ring %d)\n", + dev_warn(rdev->dev, "GPU lockup (current fence id 0x%016llx last fence id 0x%016llx on ring %d)\n", (uint64_t)atomic64_read(&fence_drv->last_seq), fence_drv->sync_seq[ring], ring); @@ -338,16 +336,16 @@ void radeon_fence_process(struct radeon_device *rdev, int ring) * radeon_fence_signaled(). */ static bool radeon_fence_seq_signaled(struct radeon_device *rdev, - u64 seq, unsigned ring) + u64 seq, unsigned int ring) { - if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { + if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) return true; - } + /* poll new last sequence at least once */ radeon_fence_process(rdev, ring); - if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { + if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) return true; - } + return false; } @@ -355,20 +353,18 @@ static bool radeon_fence_is_signaled(struct dma_fence *f) { struct radeon_fence *fence = to_radeon_fence(f); struct radeon_device *rdev = fence->rdev; - unsigned ring = fence->ring; + unsigned int ring = fence->ring; u64 seq = fence->seq; - if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { + if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) return true; - } if (down_read_trylock(&rdev->exclusive_lock)) { radeon_fence_process(rdev, ring); up_read(&rdev->exclusive_lock); - if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { + if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) return true; - } } return false; } @@ -451,7 +447,7 @@ bool radeon_fence_signaled(struct radeon_fence *fence) */ static bool radeon_fence_any_seq_signaled(struct radeon_device *rdev, u64 *seq) { - unsigned i; + unsigned int i; for (i = 0; i < RADEON_NUM_RINGS; ++i) { if (seq[i] && radeon_fence_seq_signaled(rdev, seq[i], i)) @@ -549,9 +545,8 @@ long radeon_fence_wait_timeout(struct radeon_fence *fence, bool intr, long timeo seq[fence->ring] = fence->seq; r = radeon_fence_wait_seq_timeout(fence->rdev, seq, intr, timeout); - if (r <= 0) { + if (r <= 0) return r; - } dma_fence_signal(&fence->base); return r; @@ -571,11 +566,11 @@ long radeon_fence_wait_timeout(struct radeon_fence *fence, bool intr, long timeo int radeon_fence_wait(struct radeon_fence *fence, bool intr) { long r = radeon_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT); - if (r > 0) { + + if (r > 0) return 0; - } else { + else return r; - } } /** @@ -596,15 +591,14 @@ int radeon_fence_wait_any(struct radeon_device *rdev, bool intr) { uint64_t seq[RADEON_NUM_RINGS]; - unsigned i, num_rings = 0; + unsigned int i, num_rings = 0; long r; for (i = 0; i < RADEON_NUM_RINGS; ++i) { seq[i] = 0; - if (!fences[i]) { + if (!fences[i]) continue; - } seq[i] = fences[i]->seq; ++num_rings; @@ -615,9 +609,9 @@ int radeon_fence_wait_any(struct radeon_device *rdev, return -ENOENT; r = radeon_fence_wait_seq_timeout(rdev, seq, intr, MAX_SCHEDULE_TIMEOUT); - if (r < 0) { + if (r < 0) return r; - } + return 0; } @@ -638,13 +632,16 @@ int radeon_fence_wait_next(struct radeon_device *rdev, int ring) seq[ring] = atomic64_read(&rdev->fence_drv[ring].last_seq) + 1ULL; if (seq[ring] >= rdev->fence_drv[ring].sync_seq[ring]) { - /* nothing to wait for, last_seq is - already the last emited fence */ + /* nothing to wait for, last_seq is already + * the last emited fence + */ return -ENOENT; } + r = radeon_fence_wait_seq_timeout(rdev, seq, false, MAX_SCHEDULE_TIMEOUT); if (r < 0) return r; + return 0; } @@ -704,9 +701,8 @@ void radeon_fence_unref(struct radeon_fence **fence) struct radeon_fence *tmp = *fence; *fence = NULL; - if (tmp) { + if (tmp) dma_fence_put(&tmp->base); - } } /** @@ -719,7 +715,7 @@ void radeon_fence_unref(struct radeon_fence **fence) * Returns the number of emitted fences on the ring. Used by the * dynpm code to ring track activity. */ -unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring) +unsigned int radeon_fence_count_emitted(struct radeon_device *rdev, int ring) { uint64_t emitted; @@ -730,10 +726,10 @@ unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring) emitted = rdev->fence_drv[ring].sync_seq[ring] - atomic64_read(&rdev->fence_drv[ring].last_seq); /* to avoid 32bits warp around */ - if (emitted > 0x10000000) { + if (emitted > 0x10000000) emitted = 0x10000000; - } - return (unsigned)emitted; + + return (unsigned int)emitted; } /** @@ -751,19 +747,16 @@ bool radeon_fence_need_sync(struct radeon_fence *fence, int dst_ring) { struct radeon_fence_driver *fdrv; - if (!fence) { + if (!fence) return false; - } - if (fence->ring == dst_ring) { + if (fence->ring == dst_ring) return false; - } /* we are protected by the ring mutex */ fdrv = &fence->rdev->fence_drv[dst_ring]; - if (fence->seq <= fdrv->sync_seq[fence->ring]) { + if (fence->seq <= fdrv->sync_seq[fence->ring]) return false; - } return true; } @@ -780,23 +773,21 @@ bool radeon_fence_need_sync(struct radeon_fence *fence, int dst_ring) void radeon_fence_note_sync(struct radeon_fence *fence, int dst_ring) { struct radeon_fence_driver *dst, *src; - unsigned i; + unsigned int i; - if (!fence) { + if (!fence) return; - } - if (fence->ring == dst_ring) { + if (fence->ring == dst_ring) return; - } /* we are protected by the ring mutex */ src = &fence->rdev->fence_drv[fence->ring]; dst = &fence->rdev->fence_drv[dst_ring]; for (i = 0; i < RADEON_NUM_RINGS; ++i) { - if (i == dst_ring) { + if (i == dst_ring) continue; - } + dst->sync_seq[i] = max(dst->sync_seq[i], src->sync_seq[i]); } } @@ -895,9 +886,8 @@ void radeon_fence_driver_init(struct radeon_device *rdev) int ring; init_waitqueue_head(&rdev->fence_queue); - for (ring = 0; ring < RADEON_NUM_RINGS; ring++) { + for (ring = 0; ring < RADEON_NUM_RINGS; ring++) radeon_fence_driver_init_ring(rdev, ring); - } radeon_debugfs_fence_init(rdev); } @@ -1023,6 +1013,7 @@ static const char *radeon_fence_get_driver_name(struct dma_fence *fence) static const char *radeon_fence_get_timeline_name(struct dma_fence *f) { struct radeon_fence *fence = to_radeon_fence(f); + switch (fence->ring) { case RADEON_RING_TYPE_GFX_INDEX: return "radeon.gfx"; case CAYMAN_RING_TYPE_CP1_INDEX: return "radeon.cp1"; @@ -1032,7 +1023,9 @@ static const char *radeon_fence_get_timeline_name(struct dma_fence *f) case R600_RING_TYPE_UVD_INDEX: return "radeon.uvd"; case TN_RING_TYPE_VCE1_INDEX: return "radeon.vce1"; case TN_RING_TYPE_VCE2_INDEX: return "radeon.vce2"; - default: WARN_ON_ONCE(1); return "radeon.unk"; + default: + WARN_ON_ONCE(1); + return "radeon.unk"; } } diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 4eb83ccc49..de4e6d78f1 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -197,7 +197,6 @@ static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, { struct ttm_resource *old_mem = bo->resource; struct radeon_device *rdev; - struct radeon_bo *rbo; int r; if (new_mem->mem_type == TTM_PL_TT) { @@ -210,7 +209,6 @@ static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, if (r) return r; - rbo = container_of(bo, struct radeon_bo, tbo); rdev = radeon_get_rdev(bo->bdev); if (!old_mem || (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL)) { -- cgit v1.2.3