From 6d03a247468059b0e59c821ef39e6762d4d6fc30 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Wed, 19 Jun 2024 23:00:51 +0200 Subject: Merging upstream version 6.9.2. Signed-off-by: Daniel Baumann --- drivers/mtd/nand/raw/brcmnand/Makefile | 2 +- drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c | 99 ------------------- drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c | 126 ++++++++++++++++++++++++ drivers/mtd/nand/raw/brcmnand/brcmnand.c | 136 +++++++++++++++++++++----- drivers/mtd/nand/raw/brcmnand/brcmnand.h | 2 + 5 files changed, 241 insertions(+), 124 deletions(-) delete mode 100644 drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c create mode 100644 drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c (limited to 'drivers/mtd/nand/raw/brcmnand') diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index 9907e3ec4b..0536568c64 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -2,7 +2,7 @@ # link order matters; don't link the more generic brcmstb_nand.o before the # more specific iproc_nand.o, for instance obj-$(CONFIG_MTD_NAND_BRCMNAND_IPROC) += iproc_nand.o -obj-$(CONFIG_MTD_NAND_BRCMNAND_BCMBCA) += bcm63138_nand.o +obj-$(CONFIG_MTD_NAND_BRCMNAND_BCMBCA) += bcmbca_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND_BCM63XX) += bcm6368_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND_BRCMSTB) += brcmstb_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmnand.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c deleted file mode 100644 index 968c5b674b..0000000000 --- a/drivers/mtd/nand/raw/brcmnand/bcm63138_nand.c +++ /dev/null @@ -1,99 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright © 2015 Broadcom Corporation - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include "brcmnand.h" - -struct bcm63138_nand_soc { - struct brcmnand_soc soc; - void __iomem *base; -}; - -#define BCM63138_NAND_INT_STATUS 0x00 -#define BCM63138_NAND_INT_EN 0x04 - -enum { - BCM63138_CTLRDY = BIT(4), -}; - -static bool bcm63138_nand_intc_ack(struct brcmnand_soc *soc) -{ - struct bcm63138_nand_soc *priv = - container_of(soc, struct bcm63138_nand_soc, soc); - void __iomem *mmio = priv->base + BCM63138_NAND_INT_STATUS; - u32 val = brcmnand_readl(mmio); - - if (val & BCM63138_CTLRDY) { - brcmnand_writel(val & ~BCM63138_CTLRDY, mmio); - return true; - } - - return false; -} - -static void bcm63138_nand_intc_set(struct brcmnand_soc *soc, bool en) -{ - struct bcm63138_nand_soc *priv = - container_of(soc, struct bcm63138_nand_soc, soc); - void __iomem *mmio = priv->base + BCM63138_NAND_INT_EN; - u32 val = brcmnand_readl(mmio); - - if (en) - val |= BCM63138_CTLRDY; - else - val &= ~BCM63138_CTLRDY; - - brcmnand_writel(val, mmio); -} - -static int bcm63138_nand_probe(struct platform_device *pdev) -{ - struct device *dev = &pdev->dev; - struct bcm63138_nand_soc *priv; - struct brcmnand_soc *soc; - - priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - soc = &priv->soc; - - priv->base = devm_platform_ioremap_resource_byname(pdev, "nand-int-base"); - if (IS_ERR(priv->base)) - return PTR_ERR(priv->base); - - soc->ctlrdy_ack = bcm63138_nand_intc_ack; - soc->ctlrdy_set_enabled = bcm63138_nand_intc_set; - - return brcmnand_probe(pdev, soc); -} - -static const struct of_device_id bcm63138_nand_of_match[] = { - { .compatible = "brcm,nand-bcm63138" }, - {}, -}; -MODULE_DEVICE_TABLE(of, bcm63138_nand_of_match); - -static struct platform_driver bcm63138_nand_driver = { - .probe = bcm63138_nand_probe, - .remove_new = brcmnand_remove, - .driver = { - .name = "bcm63138_nand", - .pm = &brcmnand_pm_ops, - .of_match_table = bcm63138_nand_of_match, - } -}; -module_platform_driver(bcm63138_nand_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Brian Norris"); -MODULE_DESCRIPTION("NAND driver for BCM63138"); diff --git a/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c new file mode 100644 index 0000000000..ea534850b9 --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright © 2015 Broadcom Corporation + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "brcmnand.h" + +struct bcmbca_nand_soc { + struct brcmnand_soc soc; + void __iomem *base; +}; + +#define BCMBCA_NAND_INT_STATUS 0x00 +#define BCMBCA_NAND_INT_EN 0x04 + +enum { + BCMBCA_CTLRDY = BIT(4), +}; + +#if defined(CONFIG_ARM64) +#define ALIGN_REQ 8 +#else +#define ALIGN_REQ 4 +#endif + +static inline bool bcmbca_nand_is_buf_aligned(void *flash_cache, void *buffer) +{ + return IS_ALIGNED((uintptr_t)buffer, ALIGN_REQ) && + IS_ALIGNED((uintptr_t)flash_cache, ALIGN_REQ); +} + +static bool bcmbca_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct bcmbca_nand_soc *priv = + container_of(soc, struct bcmbca_nand_soc, soc); + void __iomem *mmio = priv->base + BCMBCA_NAND_INT_STATUS; + u32 val = brcmnand_readl(mmio); + + if (val & BCMBCA_CTLRDY) { + brcmnand_writel(val & ~BCMBCA_CTLRDY, mmio); + return true; + } + + return false; +} + +static void bcmbca_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct bcmbca_nand_soc *priv = + container_of(soc, struct bcmbca_nand_soc, soc); + void __iomem *mmio = priv->base + BCMBCA_NAND_INT_EN; + u32 val = brcmnand_readl(mmio); + + if (en) + val |= BCMBCA_CTLRDY; + else + val &= ~BCMBCA_CTLRDY; + + brcmnand_writel(val, mmio); +} + +static void bcmbca_read_data_bus(struct brcmnand_soc *soc, + void __iomem *flash_cache, u32 *buffer, int fc_words) +{ + /* + * memcpy can do unaligned aligned access depending on source + * and dest address, which is incompatible with nand cache. Fallback + * to the memcpy_fromio in such case + */ + if (bcmbca_nand_is_buf_aligned((void __force *)flash_cache, buffer)) + memcpy((void *)buffer, (void __force *)flash_cache, fc_words * 4); + else + memcpy_fromio((void *)buffer, flash_cache, fc_words * 4); +} + +static int bcmbca_nand_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct bcmbca_nand_soc *priv; + struct brcmnand_soc *soc; + + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + soc = &priv->soc; + + priv->base = devm_platform_ioremap_resource_byname(pdev, "nand-int-base"); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + soc->ctlrdy_ack = bcmbca_nand_intc_ack; + soc->ctlrdy_set_enabled = bcmbca_nand_intc_set; + soc->read_data_bus = bcmbca_read_data_bus; + + return brcmnand_probe(pdev, soc); +} + +static const struct of_device_id bcmbca_nand_of_match[] = { + { .compatible = "brcm,nand-bcm63138" }, + {}, +}; +MODULE_DEVICE_TABLE(of, bcmbca_nand_of_match); + +static struct platform_driver bcmbca_nand_driver = { + .probe = bcmbca_nand_probe, + .remove_new = brcmnand_remove, + .driver = { + .name = "bcmbca_nand", + .pm = &brcmnand_pm_ops, + .of_match_table = bcmbca_nand_of_match, + } +}; +module_platform_driver(bcmbca_nand_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Brian Norris"); +MODULE_DESCRIPTION("NAND driver for BCMBCA"); diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index b8e70fc643..1b2ec0fec6 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -851,6 +851,20 @@ static inline u32 edu_readl(struct brcmnand_controller *ctrl, return brcmnand_readl(ctrl->edu_base + offs); } +static inline void brcmnand_read_data_bus(struct brcmnand_controller *ctrl, + void __iomem *flash_cache, u32 *buffer, int fc_words) +{ + struct brcmnand_soc *soc = ctrl->soc; + int i; + + if (soc && soc->read_data_bus) { + soc->read_data_bus(soc, flash_cache, buffer, fc_words); + } else { + for (i = 0; i < fc_words; i++) + buffer[i] = brcmnand_read_fc(ctrl, i); + } +} + static void brcmnand_clear_ecc_addr(struct brcmnand_controller *ctrl) { @@ -1024,6 +1038,22 @@ static inline int brcmnand_sector_1k_shift(struct brcmnand_controller *ctrl) return -1; } +static bool brcmnand_get_sector_size_1k(struct brcmnand_host *host) +{ + struct brcmnand_controller *ctrl = host->ctrl; + int sector_size_bit = brcmnand_sector_1k_shift(ctrl); + u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, + BRCMNAND_CS_ACC_CONTROL); + u32 acc_control; + + if (sector_size_bit < 0) + return false; + + acc_control = nand_readreg(ctrl, acc_control_offs); + + return ((acc_control & BIT(sector_size_bit)) != 0); +} + static void brcmnand_set_sector_size_1k(struct brcmnand_host *host, int val) { struct brcmnand_controller *ctrl = host->ctrl; @@ -1041,6 +1071,43 @@ static void brcmnand_set_sector_size_1k(struct brcmnand_host *host, int val) nand_writereg(ctrl, acc_control_offs, tmp); } +static int brcmnand_get_spare_size(struct brcmnand_host *host) +{ + struct brcmnand_controller *ctrl = host->ctrl; + u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, + BRCMNAND_CS_ACC_CONTROL); + u32 acc = nand_readreg(ctrl, acc_control_offs); + + return (acc & brcmnand_spare_area_mask(ctrl)); +} + +static void brcmnand_get_ecc_settings(struct brcmnand_host *host, struct nand_chip *chip) +{ + struct brcmnand_controller *ctrl = host->ctrl; + u16 acc_control_offs = brcmnand_cs_offset(ctrl, host->cs, + BRCMNAND_CS_ACC_CONTROL); + bool sector_size_1k = brcmnand_get_sector_size_1k(host); + int spare_area_size, ecc_level; + u32 acc; + + spare_area_size = brcmnand_get_spare_size(host); + acc = nand_readreg(ctrl, acc_control_offs); + ecc_level = (acc & brcmnand_ecc_level_mask(ctrl)) >> ctrl->ecc_level_shift; + if (sector_size_1k) + chip->ecc.strength = ecc_level * 2; + else if (spare_area_size == 16 && ecc_level == 15) + chip->ecc.strength = 1; /* hamming */ + else + chip->ecc.strength = ecc_level; + + if (chip->ecc.size == 0) { + if (sector_size_1k) + chip->ecc.size = 1024; + else + chip->ecc.size = 512; + } +} + /*********************************************************************** * CS_NAND_SELECT ***********************************************************************/ @@ -1084,8 +1151,8 @@ static int bcmnand_ctrl_poll_status(struct brcmnand_host *host, if ((val & mask) == expected_val) return 0; - dev_warn(ctrl->dev, "timeout on status poll (expected %x got %x)\n", - expected_val, val & mask); + dev_err(ctrl->dev, "timeout on status poll (expected %x got %x)\n", + expected_val, val & mask); return -ETIMEDOUT; } @@ -1975,7 +2042,7 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, { struct brcmnand_host *host = nand_get_controller_data(chip); struct brcmnand_controller *ctrl = host->ctrl; - int i, j, ret = 0; + int i, ret = 0; brcmnand_clear_ecc_addr(ctrl); @@ -1988,8 +2055,8 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip, if (likely(buf)) { brcmnand_soc_data_bus_prepare(ctrl->soc, false); - for (j = 0; j < FC_WORDS; j++, buf++) - *buf = brcmnand_read_fc(ctrl, j); + brcmnand_read_data_bus(ctrl, ctrl->nand_fc, buf, FC_WORDS); + buf += FC_WORDS; brcmnand_soc_data_bus_unprepare(ctrl->soc, false); } @@ -2137,7 +2204,7 @@ try_dmaread: return err; } - dev_dbg(ctrl->dev, "uncorrectable error at 0x%llx\n", + dev_err(ctrl->dev, "uncorrectable error at 0x%llx\n", (unsigned long long)err_addr); mtd->ecc_stats.failed++; /* NAND layer expects zero on ECC errors */ @@ -2339,7 +2406,7 @@ static int brcmnand_write_oob_raw(struct nand_chip *chip, int page) } static int brcmnand_exec_instr(struct brcmnand_host *host, int i, - const struct nand_operation *op) + const struct nand_operation *op) { const struct nand_op_instr *instr = &op->instrs[i]; struct brcmnand_controller *ctrl = host->ctrl; @@ -2353,7 +2420,7 @@ static int brcmnand_exec_instr(struct brcmnand_host *host, int i, * (WAITRDY excepted). */ last_op = ((i == (op->ninstrs - 1)) && (instr->type != NAND_OP_WAITRDY_INSTR)) || - ((i == (op->ninstrs - 2)) && (op->instrs[i+1].type == NAND_OP_WAITRDY_INSTR)); + ((i == (op->ninstrs - 2)) && (op->instrs[i + 1].type == NAND_OP_WAITRDY_INSTR)); switch (instr->type) { case NAND_OP_CMD_INSTR: @@ -2398,10 +2465,10 @@ static int brcmnand_exec_instr(struct brcmnand_host *host, int i, static int brcmnand_op_is_status(const struct nand_operation *op) { - if ((op->ninstrs == 2) && - (op->instrs[0].type == NAND_OP_CMD_INSTR) && - (op->instrs[0].ctx.cmd.opcode == NAND_CMD_STATUS) && - (op->instrs[1].type == NAND_OP_DATA_IN_INSTR)) + if (op->ninstrs == 2 && + op->instrs[0].type == NAND_OP_CMD_INSTR && + op->instrs[0].ctx.cmd.opcode == NAND_CMD_STATUS && + op->instrs[1].type == NAND_OP_DATA_IN_INSTR) return 1; return 0; @@ -2409,10 +2476,10 @@ static int brcmnand_op_is_status(const struct nand_operation *op) static int brcmnand_op_is_reset(const struct nand_operation *op) { - if ((op->ninstrs == 2) && - (op->instrs[0].type == NAND_OP_CMD_INSTR) && - (op->instrs[0].ctx.cmd.opcode == NAND_CMD_RESET) && - (op->instrs[1].type == NAND_OP_WAITRDY_INSTR)) + if (op->ninstrs == 2 && + op->instrs[0].type == NAND_OP_CMD_INSTR && + op->instrs[0].ctx.cmd.opcode == NAND_CMD_RESET && + op->instrs[1].type == NAND_OP_WAITRDY_INSTR) return 1; return 0; @@ -2440,8 +2507,7 @@ static int brcmnand_exec_op(struct nand_chip *chip, *status = ret & 0xFF; return 0; - } - else if (brcmnand_op_is_reset(op)) { + } else if (brcmnand_op_is_reset(op)) { ret = brcmnand_reset(host); if (ret < 0) return ret; @@ -2612,19 +2678,37 @@ static int brcmnand_setup_dev(struct brcmnand_host *host) nanddev_get_memorg(&chip->base); struct brcmnand_controller *ctrl = host->ctrl; struct brcmnand_cfg *cfg = &host->hwcfg; - char msg[128]; + struct device_node *np = nand_get_flash_node(chip); u32 offs, tmp, oob_sector; + bool use_strap = false; + char msg[128]; int ret; memset(cfg, 0, sizeof(*cfg)); + use_strap = of_property_read_bool(np, "brcm,nand-ecc-use-strap"); - ret = of_property_read_u32(nand_get_flash_node(chip), - "brcm,nand-oob-sector-size", + /* + * Either nand-ecc-xxx or brcm,nand-ecc-use-strap can be set. Error out + * if both exist. + */ + if (chip->ecc.strength && use_strap) { + dev_err(ctrl->dev, + "ECC strap and DT ECC configuration properties are mutually exclusive\n"); + return -EINVAL; + } + + if (use_strap) + brcmnand_get_ecc_settings(host, chip); + + ret = of_property_read_u32(np, "brcm,nand-oob-sector-size", &oob_sector); if (ret) { - /* Use detected size */ - cfg->spare_area_size = mtd->oobsize / - (mtd->writesize >> FC_SHIFT); + if (use_strap) + cfg->spare_area_size = brcmnand_get_spare_size(host); + else + /* Use detected size */ + cfg->spare_area_size = mtd->oobsize / + (mtd->writesize >> FC_SHIFT); } else { cfg->spare_area_size = oob_sector; } @@ -3139,6 +3223,10 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) /* Disable XOR addressing */ brcmnand_rmw_reg(ctrl, BRCMNAND_CS_XOR, 0xff, 0, 0); + /* Check if the board connects the WP pin */ + if (of_property_read_bool(dn, "brcm,wp-not-connected")) + wp_on = 0; + if (ctrl->features & BRCMNAND_HAS_WP) { /* Permanently disable write protection */ if (wp_on == 2) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.h b/drivers/mtd/nand/raw/brcmnand/brcmnand.h index 928114c0be..9f171252a2 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.h +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.h @@ -24,6 +24,8 @@ struct brcmnand_soc { void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en); void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare, bool is_param); + void (*read_data_bus)(struct brcmnand_soc *soc, void __iomem *flash_cache, + u32 *buffer, int fc_words); const struct brcmnand_io_ops *ops; }; -- cgit v1.2.3