From ace9429bb58fd418f0c81d4c2835699bddf6bde6 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Thu, 11 Apr 2024 10:27:49 +0200 Subject: Adding upstream version 6.6.15. Signed-off-by: Daniel Baumann --- drivers/pinctrl/renesas/core.h | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 drivers/pinctrl/renesas/core.h (limited to 'drivers/pinctrl/renesas/core.h') diff --git a/drivers/pinctrl/renesas/core.h b/drivers/pinctrl/renesas/core.h new file mode 100644 index 0000000000..51f391e971 --- /dev/null +++ b/drivers/pinctrl/renesas/core.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * SuperH Pin Function Controller support. + * + * Copyright (C) 2012 Renesas Solutions Corp. + */ +#ifndef __SH_PFC_CORE_H__ +#define __SH_PFC_CORE_H__ + +#include + +#include "sh_pfc.h" + +struct sh_pfc_pin_range { + u16 start; + u16 end; +}; + +int sh_pfc_register_gpiochip(struct sh_pfc *pfc); + +int sh_pfc_register_pinctrl(struct sh_pfc *pfc); + +u32 sh_pfc_read_raw_reg(void __iomem *mapped_reg, unsigned int reg_width); +void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width, + u32 data); +u32 sh_pfc_read(struct sh_pfc *pfc, u32 reg); +void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data); + +int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin); +int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type); + +#endif /* __SH_PFC_CORE_H__ */ -- cgit v1.2.3