From 85c675d0d09a45a135bddd15d7b385f8758c32fb Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sat, 18 May 2024 19:35:05 +0200 Subject: Adding upstream version 6.7.7. Signed-off-by: Daniel Baumann --- drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/staging/rtl8723bs/hal') diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c index a3bff27af5..7764896a04 100644 --- a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c +++ b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c @@ -153,7 +153,7 @@ static u32 phy_RFSerialRead_8723B( * @Data: The new register Data in the target bit position * of the target to be read * - * .. Note:: Threre are three types of serial operations: + * .. Note:: There are three types of serial operations: * 1. Software serial write * 2. Hardware LSSI-Low Speed Serial Interface * 3. Hardware HSSI-High speed @@ -280,7 +280,7 @@ void PHY_SetRFReg_8723B( /*----------------------------------------------------------------------------- - * PHY_MACConfig8192C - Condig MAC by header file or parameter file. + * PHY_MACConfig8192C - Config MAC by header file or parameter file. * * Revised History: * When Who Remark @@ -325,7 +325,7 @@ static void phy_InitBBRFRegisterDefinition(struct adapter *Adapter) pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */ pHalData->PHYRegDef[RF_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; /* wire control parameter2 */ - /* Tranceiver Readback LSSI/HSPI mode */ + /* Transceiver Readback LSSI/HSPI mode */ pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; -- cgit v1.2.3