From dc50eab76b709d68175a358d6e23a5a3890764d3 Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sat, 18 May 2024 19:39:57 +0200 Subject: Merging upstream version 6.7.7. Signed-off-by: Daniel Baumann --- drivers/staging/vt6655/baseband.c | 86 ++++++++-------- drivers/staging/vt6655/card.c | 194 +++++++++++++++++------------------ drivers/staging/vt6655/card.h | 10 +- drivers/staging/vt6655/channel.c | 28 ++--- drivers/staging/vt6655/device.h | 28 ++--- drivers/staging/vt6655/device_main.c | 46 ++++----- drivers/staging/vt6655/dpc.c | 2 +- drivers/staging/vt6655/rf.c | 18 ++-- drivers/staging/vt6655/rf.h | 2 +- 9 files changed, 207 insertions(+), 207 deletions(-) (limited to 'drivers/staging/vt6655') diff --git a/drivers/staging/vt6655/baseband.c b/drivers/staging/vt6655/baseband.c index 696d4dd03a..f7824396c5 100644 --- a/drivers/staging/vt6655/baseband.c +++ b/drivers/staging/vt6655/baseband.c @@ -761,7 +761,7 @@ static const unsigned char vt3253b0_rfmd[CB_VT3253B0_INIT_FOR_RFMD][2] = { #define CB_VT3253B0_AGC_FOR_RFMD2959 195 /* For RFMD2959 */ static -unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = { +unsigned char vt3253b0_agc4_rfmd2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = { {0xF0, 0x00}, {0xF1, 0x3E}, {0xF0, 0x80}, @@ -962,7 +962,7 @@ unsigned char byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = { #define CB_VT3253B0_INIT_FOR_AIROHA2230 256 /* For AIROHA */ static -unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = { +unsigned char vt3253b0_airoha2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = { {0x00, 0x31}, {0x01, 0x00}, {0x02, 0x00}, @@ -1223,7 +1223,7 @@ unsigned char byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = { #define CB_VT3253B0_INIT_FOR_UW2451 256 /* For UW2451 */ -static unsigned char byVT3253B0_UW2451[CB_VT3253B0_INIT_FOR_UW2451][2] = { +static unsigned char vt3253b0_uw2451[CB_VT3253B0_INIT_FOR_UW2451][2] = { {0x00, 0x31}, {0x01, 0x00}, {0x02, 0x00}, @@ -1484,7 +1484,7 @@ static unsigned char byVT3253B0_UW2451[CB_VT3253B0_INIT_FOR_UW2451][2] = { #define CB_VT3253B0_AGC 193 /* For AIROHA */ -static unsigned char byVT3253B0_AGC[CB_VT3253B0_AGC][2] = { +static unsigned char vt3253b0_agc[CB_VT3253B0_AGC][2] = { {0xF0, 0x00}, {0xF1, 0x00}, {0xF0, 0x80}, @@ -1979,7 +1979,7 @@ bool bb_write_embedded(struct vnt_private *priv, unsigned char by_bb_addr, * In: * iobase - I/O base address * byRevId - Revision ID - * byRFType - RF type + * rf_type - RF type * Out: * none * @@ -1992,10 +1992,10 @@ bool bb_vt3253_init(struct vnt_private *priv) bool result = true; int ii; void __iomem *iobase = priv->port_offset; - unsigned char by_rf_type = priv->byRFType; + unsigned char rf_type = priv->rf_type; unsigned char by_local_id = priv->local_id; - if (by_rf_type == RF_RFMD2959) { + if (rf_type == RF_RFMD2959) { if (by_local_id <= REV_ID_VT3253_A1) { for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++) result &= bb_write_embedded(priv, @@ -2010,74 +2010,74 @@ bool bb_vt3253_init(struct vnt_private *priv) for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++) result &= bb_write_embedded(priv, - byVT3253B0_AGC4_RFMD2959[ii][0], - byVT3253B0_AGC4_RFMD2959[ii][1]); + vt3253b0_agc4_rfmd2959[ii][0], + vt3253b0_agc4_rfmd2959[ii][1]); iowrite32(0x23, iobase + MAC_REG_ITRTMSET); vt6655_mac_reg_bits_on(iobase, MAC_REG_PAPEDELAY, BIT(0)); } - priv->abyBBVGA[0] = 0x18; - priv->abyBBVGA[1] = 0x0A; - priv->abyBBVGA[2] = 0x0; - priv->abyBBVGA[3] = 0x0; + priv->bbvga[0] = 0x18; + priv->bbvga[1] = 0x0A; + priv->bbvga[2] = 0x0; + priv->bbvga[3] = 0x0; priv->dbm_threshold[0] = -70; priv->dbm_threshold[1] = -50; priv->dbm_threshold[2] = 0; priv->dbm_threshold[3] = 0; - } else if ((by_rf_type == RF_AIROHA) || (by_rf_type == RF_AL2230S)) { + } else if ((rf_type == RF_AIROHA) || (rf_type == RF_AL2230S)) { for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) result &= bb_write_embedded(priv, - byVT3253B0_AIROHA2230[ii][0], - byVT3253B0_AIROHA2230[ii][1]); + vt3253b0_airoha2230[ii][0], + vt3253b0_airoha2230[ii][1]); for (ii = 0; ii < CB_VT3253B0_AGC; ii++) result &= bb_write_embedded(priv, - byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); + vt3253b0_agc[ii][0], vt3253b0_agc[ii][1]); - priv->abyBBVGA[0] = 0x1C; - priv->abyBBVGA[1] = 0x10; - priv->abyBBVGA[2] = 0x0; - priv->abyBBVGA[3] = 0x0; + priv->bbvga[0] = 0x1C; + priv->bbvga[1] = 0x10; + priv->bbvga[2] = 0x0; + priv->bbvga[3] = 0x0; priv->dbm_threshold[0] = -70; priv->dbm_threshold[1] = -48; priv->dbm_threshold[2] = 0; priv->dbm_threshold[3] = 0; - } else if (by_rf_type == RF_UW2451) { + } else if (rf_type == RF_UW2451) { for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) result &= bb_write_embedded(priv, - byVT3253B0_UW2451[ii][0], - byVT3253B0_UW2451[ii][1]); + vt3253b0_uw2451[ii][0], + vt3253b0_uw2451[ii][1]); for (ii = 0; ii < CB_VT3253B0_AGC; ii++) result &= bb_write_embedded(priv, - byVT3253B0_AGC[ii][0], - byVT3253B0_AGC[ii][1]); + vt3253b0_agc[ii][0], + vt3253b0_agc[ii][1]); iowrite8(0x23, iobase + MAC_REG_ITRTMSET); vt6655_mac_reg_bits_on(iobase, MAC_REG_PAPEDELAY, BIT(0)); - priv->abyBBVGA[0] = 0x14; - priv->abyBBVGA[1] = 0x0A; - priv->abyBBVGA[2] = 0x0; - priv->abyBBVGA[3] = 0x0; + priv->bbvga[0] = 0x14; + priv->bbvga[1] = 0x0A; + priv->bbvga[2] = 0x0; + priv->bbvga[3] = 0x0; priv->dbm_threshold[0] = -60; priv->dbm_threshold[1] = -50; priv->dbm_threshold[2] = 0; priv->dbm_threshold[3] = 0; - } else if (by_rf_type == RF_VT3226) { + } else if (rf_type == RF_VT3226) { for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) result &= bb_write_embedded(priv, - byVT3253B0_AIROHA2230[ii][0], - byVT3253B0_AIROHA2230[ii][1]); + vt3253b0_airoha2230[ii][0], + vt3253b0_airoha2230[ii][1]); for (ii = 0; ii < CB_VT3253B0_AGC; ii++) result &= bb_write_embedded(priv, - byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); + vt3253b0_agc[ii][0], vt3253b0_agc[ii][1]); - priv->abyBBVGA[0] = 0x1C; - priv->abyBBVGA[1] = 0x10; - priv->abyBBVGA[2] = 0x0; - priv->abyBBVGA[3] = 0x0; + priv->bbvga[0] = 0x1C; + priv->bbvga[1] = 0x10; + priv->bbvga[2] = 0x0; + priv->bbvga[3] = 0x0; priv->dbm_threshold[0] = -70; priv->dbm_threshold[1] = -48; priv->dbm_threshold[2] = 0; @@ -2087,8 +2087,8 @@ bool bb_vt3253_init(struct vnt_private *priv) /* {{ RobertYu: 20050104 */ } else { /* No VGA Table now */ - priv->bUpdateBBVGA = false; - priv->abyBBVGA[0] = 0x1C; + priv->update_bbvga = false; + priv->bbvga[0] = 0x1C; } if (by_local_id > REV_ID_VT3253_A1) { @@ -2126,7 +2126,7 @@ bb_set_short_slot_time(struct vnt_private *priv) /* patch for 3253B0 Baseband with Cardbus module */ bb_read_embedded(priv, 0xE7, &by_bb_vga); - if (by_bb_vga == priv->abyBBVGA[0]) + if (by_bb_vga == priv->bbvga[0]) by_bb_rx_conf |= 0x20; /* 0010 0000 */ bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */ @@ -2140,13 +2140,13 @@ void bb_set_vga_gain_offset(struct vnt_private *priv, unsigned char by_data) bb_read_embedded(priv, 0x0A, &by_bb_rx_conf); /* CR10 */ /* patch for 3253B0 Baseband with Cardbus module */ - if (by_data == priv->abyBBVGA[0]) + if (by_data == priv->bbvga[0]) by_bb_rx_conf |= 0x20; /* 0010 0000 */ else if (priv->short_slot_time) by_bb_rx_conf &= 0xDF; /* 1101 1111 */ else by_bb_rx_conf |= 0x20; /* 0010 0000 */ - priv->byBBVGACurrent = by_data; + priv->bbvga_current = by_data; bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */ } diff --git a/drivers/staging/vt6655/card.c b/drivers/staging/vt6655/card.c index c680925b9c..350ab8f377 100644 --- a/drivers/staging/vt6655/card.c +++ b/drivers/staging/vt6655/card.c @@ -6,7 +6,7 @@ * Purpose: Provide functions to setup NIC operation mode * Functions: * s_vSafeResetTx - Rest Tx - * CARDvSetRSPINF - Set RSPINF + * card_set_rspinf - Set RSPINF * CARDvUpdateBasicTopRate - Update BasicTopRate * CARDbAddBasicRate - Add to BasicRateSet * CARDbIsOFDMinBasicRate - Check if any OFDM rate is in BasicRateSet @@ -50,7 +50,7 @@ /*--------------------- Static Variables --------------------------*/ -static const unsigned short cwRXBCNTSFOff[MAX_RATE] = { +static const unsigned short rx_bcn_tsf_off[MAX_RATE] = { 17, 17, 17, 17, 34, 23, 17, 11, 8, 5, 4, 3}; /*--------------------- Static Functions --------------------------*/ @@ -75,95 +75,95 @@ static void vt6655_mac_set_bb_type(void __iomem *iobase, u32 mask) * wRate - Tx Rate * byPktType - Tx Packet type * Out: - * pbyTxRate - pointer to RSPINF TxRate field - * pbyRsvTime - pointer to RSPINF RsvTime field + * tx_rate - pointer to RSPINF TxRate field + * rsv_time - pointer to RSPINF RsvTime field * * Return Value: none */ -static void s_vCalculateOFDMRParameter(unsigned char rate, +static void calculate_ofdmr_parameter(unsigned char rate, u8 bb_type, - unsigned char *pbyTxRate, - unsigned char *pbyRsvTime) + unsigned char *tx_rate, + unsigned char *rsv_time) { switch (rate) { case RATE_6M: if (bb_type == BB_TYPE_11A) { /* 5GHZ */ - *pbyTxRate = 0x9B; - *pbyRsvTime = 44; + *tx_rate = 0x9B; + *rsv_time = 44; } else { - *pbyTxRate = 0x8B; - *pbyRsvTime = 50; + *tx_rate = 0x8B; + *rsv_time = 50; } break; case RATE_9M: if (bb_type == BB_TYPE_11A) { /* 5GHZ */ - *pbyTxRate = 0x9F; - *pbyRsvTime = 36; + *tx_rate = 0x9F; + *rsv_time = 36; } else { - *pbyTxRate = 0x8F; - *pbyRsvTime = 42; + *tx_rate = 0x8F; + *rsv_time = 42; } break; case RATE_12M: if (bb_type == BB_TYPE_11A) { /* 5GHZ */ - *pbyTxRate = 0x9A; - *pbyRsvTime = 32; + *tx_rate = 0x9A; + *rsv_time = 32; } else { - *pbyTxRate = 0x8A; - *pbyRsvTime = 38; + *tx_rate = 0x8A; + *rsv_time = 38; } break; case RATE_18M: if (bb_type == BB_TYPE_11A) { /* 5GHZ */ - *pbyTxRate = 0x9E; - *pbyRsvTime = 28; + *tx_rate = 0x9E; + *rsv_time = 28; } else { - *pbyTxRate = 0x8E; - *pbyRsvTime = 34; + *tx_rate = 0x8E; + *rsv_time = 34; } break; case RATE_36M: if (bb_type == BB_TYPE_11A) { /* 5GHZ */ - *pbyTxRate = 0x9D; - *pbyRsvTime = 24; + *tx_rate = 0x9D; + *rsv_time = 24; } else { - *pbyTxRate = 0x8D; - *pbyRsvTime = 30; + *tx_rate = 0x8D; + *rsv_time = 30; } break; case RATE_48M: if (bb_type == BB_TYPE_11A) { /* 5GHZ */ - *pbyTxRate = 0x98; - *pbyRsvTime = 24; + *tx_rate = 0x98; + *rsv_time = 24; } else { - *pbyTxRate = 0x88; - *pbyRsvTime = 30; + *tx_rate = 0x88; + *rsv_time = 30; } break; case RATE_54M: if (bb_type == BB_TYPE_11A) { /* 5GHZ */ - *pbyTxRate = 0x9C; - *pbyRsvTime = 24; + *tx_rate = 0x9C; + *rsv_time = 24; } else { - *pbyTxRate = 0x8C; - *pbyRsvTime = 30; + *tx_rate = 0x8C; + *rsv_time = 30; } break; case RATE_24M: default: if (bb_type == BB_TYPE_11A) { /* 5GHZ */ - *pbyTxRate = 0x99; - *pbyRsvTime = 28; + *tx_rate = 0x99; + *rsv_time = 28; } else { - *pbyTxRate = 0x89; - *pbyRsvTime = 34; + *tx_rate = 0x89; + *rsv_time = 34; } break; } @@ -182,59 +182,59 @@ static void s_vCalculateOFDMRParameter(unsigned char rate, * * Return Value: None. */ -bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) +bool card_set_phy_parameter(struct vnt_private *priv, u8 bb_type) { - unsigned char byCWMaxMin = 0; - unsigned char bySlot = 0; - unsigned char bySIFS = 0; - unsigned char byDIFS = 0; + unsigned char cw_max_min = 0; + unsigned char slot = 0; + unsigned char sifs = 0; + unsigned char difs = 0; int i; /* Set SIFS, DIFS, EIFS, SlotTime, CwMin */ if (bb_type == BB_TYPE_11A) { vt6655_mac_set_bb_type(priv->port_offset, BB_TYPE_11A); bb_write_embedded(priv, 0x88, 0x03); - bySlot = C_SLOT_SHORT; - bySIFS = C_SIFS_A; - byDIFS = C_SIFS_A + 2 * C_SLOT_SHORT; - byCWMaxMin = 0xA4; + slot = C_SLOT_SHORT; + sifs = C_SIFS_A; + difs = C_SIFS_A + 2 * C_SLOT_SHORT; + cw_max_min = 0xA4; } else if (bb_type == BB_TYPE_11B) { vt6655_mac_set_bb_type(priv->port_offset, BB_TYPE_11B); bb_write_embedded(priv, 0x88, 0x02); - bySlot = C_SLOT_LONG; - bySIFS = C_SIFS_BG; - byDIFS = C_SIFS_BG + 2 * C_SLOT_LONG; - byCWMaxMin = 0xA5; + slot = C_SLOT_LONG; + sifs = C_SIFS_BG; + difs = C_SIFS_BG + 2 * C_SLOT_LONG; + cw_max_min = 0xA5; } else { /* PK_TYPE_11GA & PK_TYPE_11GB */ vt6655_mac_set_bb_type(priv->port_offset, BB_TYPE_11G); bb_write_embedded(priv, 0x88, 0x08); - bySIFS = C_SIFS_BG; + sifs = C_SIFS_BG; if (priv->short_slot_time) { - bySlot = C_SLOT_SHORT; - byDIFS = C_SIFS_BG + 2 * C_SLOT_SHORT; + slot = C_SLOT_SHORT; + difs = C_SIFS_BG + 2 * C_SLOT_SHORT; } else { - bySlot = C_SLOT_LONG; - byDIFS = C_SIFS_BG + 2 * C_SLOT_LONG; + slot = C_SLOT_LONG; + difs = C_SIFS_BG + 2 * C_SLOT_LONG; } - byCWMaxMin = 0xa4; + cw_max_min = 0xa4; for (i = RATE_54M; i >= RATE_6M; i--) { if (priv->basic_rates & ((u32)(0x1 << i))) { - byCWMaxMin |= 0x1; + cw_max_min |= 0x1; break; } } } - if (priv->byRFType == RF_RFMD2959) { + if (priv->rf_type == RF_RFMD2959) { /* * bcs TX_PE will reserve 3 us hardware's processing * time here is 2 us. */ - bySIFS -= 3; - byDIFS -= 3; + sifs -= 3; + difs -= 3; /* * TX_PE will reserve 3 us for MAX2829 A mode only, it is for * better TX throughput; MAC will need 2 us to process, so the @@ -242,32 +242,32 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) */ } - if (priv->bySIFS != bySIFS) { - priv->bySIFS = bySIFS; - iowrite8(priv->bySIFS, priv->port_offset + MAC_REG_SIFS); + if (priv->sifs != sifs) { + priv->sifs = sifs; + iowrite8(priv->sifs, priv->port_offset + MAC_REG_SIFS); } - if (priv->byDIFS != byDIFS) { - priv->byDIFS = byDIFS; - iowrite8(priv->byDIFS, priv->port_offset + MAC_REG_DIFS); + if (priv->difs != difs) { + priv->difs = difs; + iowrite8(priv->difs, priv->port_offset + MAC_REG_DIFS); } - if (priv->byEIFS != C_EIFS) { - priv->byEIFS = C_EIFS; - iowrite8(priv->byEIFS, priv->port_offset + MAC_REG_EIFS); + if (priv->eifs != C_EIFS) { + priv->eifs = C_EIFS; + iowrite8(priv->eifs, priv->port_offset + MAC_REG_EIFS); } - if (priv->bySlot != bySlot) { - priv->bySlot = bySlot; - iowrite8(priv->bySlot, priv->port_offset + MAC_REG_SLOT); + if (priv->slot != slot) { + priv->slot = slot; + iowrite8(priv->slot, priv->port_offset + MAC_REG_SLOT); bb_set_short_slot_time(priv); } - if (priv->byCWMaxMin != byCWMaxMin) { - priv->byCWMaxMin = byCWMaxMin; - iowrite8(priv->byCWMaxMin, priv->port_offset + MAC_REG_CWMAXMIN0); + if (priv->cw_max_min != cw_max_min) { + priv->cw_max_min = cw_max_min; + iowrite8(priv->cw_max_min, priv->port_offset + MAC_REG_CWMAXMIN0); } - priv->byPacketType = CARDbyGetPktType(priv); + priv->packet_type = card_get_pkt_type(priv); - CARDvSetRSPINF(priv, bb_type); + card_set_rspinf(priv, bb_type); return true; } @@ -278,8 +278,8 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) * * Parameters: * In: - * priv - The adapter to be sync. - * byRxRate - data rate of receive beacon + * priv - The adapter to be sync. + * rx_rate - data rate of receive beacon * qwBSSTimestamp - Rx BCN's TSF * qwLocalTSF - Local TSF * Out: @@ -287,7 +287,7 @@ bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type) * * Return Value: none */ -bool CARDbUpdateTSF(struct vnt_private *priv, unsigned char byRxRate, +bool card_update_tsf(struct vnt_private *priv, unsigned char rx_rate, u64 qwBSSTimestamp) { u64 local_tsf; @@ -296,7 +296,7 @@ bool CARDbUpdateTSF(struct vnt_private *priv, unsigned char byRxRate, local_tsf = vt6655_get_current_tsf(priv); if (qwBSSTimestamp != local_tsf) { - qwTSFOffset = CARDqGetTSFOffset(byRxRate, qwBSSTimestamp, + qwTSFOffset = CARDqGetTSFOffset(rx_rate, qwBSSTimestamp, local_tsf); /* adjust TSF, HW's TSF add TSF Offset reg */ qwTSFOffset = le64_to_cpu(qwTSFOffset); @@ -356,7 +356,7 @@ void CARDbRadioPowerOff(struct vnt_private *priv) if (priv->radio_off) return; - switch (priv->byRFType) { + switch (priv->rf_type) { case RF_RFMD2959: vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_TXPEINV); @@ -536,7 +536,7 @@ static unsigned short CARDwGetOFDMControlRate(struct vnt_private *priv, * * Return Value: None. */ -void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type) +void card_set_rspinf(struct vnt_private *priv, u8 bb_type) { union vnt_phy_field_swap phy; unsigned char byTxRate, byRsvTime; /* For OFDM */ @@ -585,58 +585,58 @@ void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type) iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_11); /* RSPINF_a_6 */ - s_vCalculateOFDMRParameter(RATE_6M, + calculate_ofdmr_parameter(RATE_6M, bb_type, &byTxRate, &byRsvTime); iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_6); /* RSPINF_a_9 */ - s_vCalculateOFDMRParameter(RATE_9M, + calculate_ofdmr_parameter(RATE_9M, bb_type, &byTxRate, &byRsvTime); iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_9); /* RSPINF_a_12 */ - s_vCalculateOFDMRParameter(RATE_12M, + calculate_ofdmr_parameter(RATE_12M, bb_type, &byTxRate, &byRsvTime); iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_12); /* RSPINF_a_18 */ - s_vCalculateOFDMRParameter(RATE_18M, + calculate_ofdmr_parameter(RATE_18M, bb_type, &byTxRate, &byRsvTime); iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_18); /* RSPINF_a_24 */ - s_vCalculateOFDMRParameter(RATE_24M, + calculate_ofdmr_parameter(RATE_24M, bb_type, &byTxRate, &byRsvTime); iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_24); /* RSPINF_a_36 */ - s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, + calculate_ofdmr_parameter(CARDwGetOFDMControlRate((void *)priv, RATE_36M), bb_type, &byTxRate, &byRsvTime); iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_36); /* RSPINF_a_48 */ - s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, + calculate_ofdmr_parameter(CARDwGetOFDMControlRate((void *)priv, RATE_48M), bb_type, &byTxRate, &byRsvTime); iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_48); /* RSPINF_a_54 */ - s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, + calculate_ofdmr_parameter(CARDwGetOFDMControlRate((void *)priv, RATE_54M), bb_type, &byTxRate, &byRsvTime); iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_54); /* RSPINF_a_72 */ - s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv, + calculate_ofdmr_parameter(CARDwGetOFDMControlRate((void *)priv, RATE_54M), bb_type, &byTxRate, @@ -684,7 +684,7 @@ bool CARDbIsOFDMinBasicRate(struct vnt_private *priv) return false; } -unsigned char CARDbyGetPktType(struct vnt_private *priv) +unsigned char card_get_pkt_type(struct vnt_private *priv) { if (priv->byBBType == BB_TYPE_11A || priv->byBBType == BB_TYPE_11B) return (unsigned char)priv->byBBType; @@ -708,11 +708,11 @@ unsigned char CARDbyGetPktType(struct vnt_private *priv) * * Return Value: TSF Offset value */ -u64 CARDqGetTSFOffset(unsigned char byRxRate, u64 qwTSF1, u64 qwTSF2) +u64 CARDqGetTSFOffset(unsigned char rx_rate, u64 qwTSF1, u64 qwTSF2) { unsigned short wRxBcnTSFOffst; - wRxBcnTSFOffst = cwRXBCNTSFOff[byRxRate % MAX_RATE]; + wRxBcnTSFOffst = rx_bcn_tsf_off[rx_rate % MAX_RATE]; qwTSF2 += (u64)wRxBcnTSFOffst; diff --git a/drivers/staging/vt6655/card.h b/drivers/staging/vt6655/card.h index 22dc359a65..19689a291f 100644 --- a/drivers/staging/vt6655/card.h +++ b/drivers/staging/vt6655/card.h @@ -39,7 +39,7 @@ struct vnt_private; -void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type); +void card_set_rspinf(struct vnt_private *priv, u8 bb_type); void CARDvUpdateBasicTopRate(struct vnt_private *priv); bool CARDbIsOFDMinBasicRate(struct vnt_private *priv); void CARDvSetFirstNextTBTT(struct vnt_private *priv, @@ -48,13 +48,13 @@ void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF, unsigned short wBeaconInterval); u64 vt6655_get_current_tsf(struct vnt_private *priv); u64 CARDqGetNextTBTT(u64 qwTSF, unsigned short wBeaconInterval); -u64 CARDqGetTSFOffset(unsigned char byRxRate, u64 qwTSF1, u64 qwTSF2); -unsigned char CARDbyGetPktType(struct vnt_private *priv); +u64 CARDqGetTSFOffset(unsigned char rx_rate, u64 qwTSF1, u64 qwTSF2); +unsigned char card_get_pkt_type(struct vnt_private *priv); void CARDvSafeResetTx(struct vnt_private *priv); void CARDvSafeResetRx(struct vnt_private *priv); void CARDbRadioPowerOff(struct vnt_private *priv); -bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type); -bool CARDbUpdateTSF(struct vnt_private *priv, unsigned char byRxRate, +bool card_set_phy_parameter(struct vnt_private *priv, u8 bb_type); +bool card_update_tsf(struct vnt_private *priv, unsigned char rx_rate, u64 qwBSSTimestamp); bool CARDbSetBeaconPeriod(struct vnt_private *priv, unsigned short wBeaconInterval); diff --git a/drivers/staging/vt6655/channel.c b/drivers/staging/vt6655/channel.c index 4122875ebc..771c1364b0 100644 --- a/drivers/staging/vt6655/channel.c +++ b/drivers/staging/vt6655/channel.c @@ -82,15 +82,15 @@ bool set_channel(struct vnt_private *priv, struct ieee80211_channel *ch) { bool ret = true; - if (priv->byCurrentCh == ch->hw_value) + if (priv->current_ch == ch->hw_value) return ret; /* Set VGA to max sensitivity */ - if (priv->bUpdateBBVGA && - priv->byBBVGACurrent != priv->abyBBVGA[0]) { - priv->byBBVGACurrent = priv->abyBBVGA[0]; + if (priv->update_bbvga && + priv->bbvga_current != priv->bbvga[0]) { + priv->bbvga_current = priv->bbvga[0]; - bb_set_vga_gain_offset(priv, priv->byBBVGACurrent); + bb_set_vga_gain_offset(priv, priv->bbvga_current); } /* clear NAV */ @@ -100,13 +100,13 @@ bool set_channel(struct vnt_private *priv, struct ieee80211_channel *ch) * it is for better TX throughput */ - priv->byCurrentCh = ch->hw_value; - ret &= RFbSelectChannel(priv, priv->byRFType, + priv->current_ch = ch->hw_value; + ret &= RFbSelectChannel(priv, priv->rf_type, ch->hw_value); /* Init Synthesizer Table */ if (priv->bEnablePSMode) - rf_write_wake_prog_syn(priv, priv->byRFType, ch->hw_value); + rf_write_wake_prog_syn(priv, priv->rf_type, ch->hw_value); bb_software_reset(priv); @@ -117,19 +117,19 @@ bool set_channel(struct vnt_private *priv, struct ieee80211_channel *ch) /* set HW default power register */ VT6655_MAC_SELECT_PAGE1(priv->port_offset); - RFbSetPower(priv, RATE_1M, priv->byCurrentCh); - iowrite8(priv->byCurPwr, priv->port_offset + MAC_REG_PWRCCK); - RFbSetPower(priv, RATE_6M, priv->byCurrentCh); - iowrite8(priv->byCurPwr, priv->port_offset + MAC_REG_PWROFDM); + RFbSetPower(priv, RATE_1M, priv->current_ch); + iowrite8(priv->cur_pwr, priv->port_offset + MAC_REG_PWRCCK); + RFbSetPower(priv, RATE_6M, priv->current_ch); + iowrite8(priv->cur_pwr, priv->port_offset + MAC_REG_PWROFDM); VT6655_MAC_SELECT_PAGE0(priv->port_offset); spin_unlock_irqrestore(&priv->lock, flags); } if (priv->byBBType == BB_TYPE_11B) - RFbSetPower(priv, RATE_1M, priv->byCurrentCh); + RFbSetPower(priv, RATE_1M, priv->current_ch); else - RFbSetPower(priv, RATE_6M, priv->byCurrentCh); + RFbSetPower(priv, RATE_6M, priv->current_ch); return ret; } diff --git a/drivers/staging/vt6655/device.h b/drivers/staging/vt6655/device.h index c272a4ab2f..d9ee0b7401 100644 --- a/drivers/staging/vt6655/device.h +++ b/drivers/staging/vt6655/device.h @@ -153,7 +153,7 @@ struct vnt_private { /* Version control */ unsigned char local_id; - unsigned char byRFType; + unsigned char rf_type; unsigned char max_pwr_level; unsigned char byZoneType; @@ -181,14 +181,14 @@ struct vnt_private { unsigned int uCwMin; /* Current CwMin */ unsigned int uCwMax; /* CwMax is fixed on 1023. */ /* PHY parameter */ - unsigned char bySIFS; - unsigned char byDIFS; - unsigned char byEIFS; - unsigned char bySlot; - unsigned char byCWMaxMin; + unsigned char sifs; + unsigned char difs; + unsigned char eifs; + unsigned char slot; + unsigned char cw_max_min; u8 byBBType; /* 0:11A, 1:11B, 2:11G */ - u8 byPacketType; /* + u8 packet_type; /* * 0:11a,1:11b,2:11gb (only CCK * in BasicRate), 3:11ga (OFDM in * Basic Rate) @@ -239,21 +239,21 @@ struct vnt_private { bool bIsBeaconBufReadySet; unsigned int cbBeaconBufReadySetCnt; bool bFixRate; - u16 byCurrentCh; + u16 current_ch; bool bAES; unsigned char byAutoFBCtrl; /* For Update BaseBand VGA Gain Offset */ - bool bUpdateBBVGA; + bool update_bbvga; unsigned int uBBVGADiffCount; - unsigned char byBBVGANew; - unsigned char byBBVGACurrent; - unsigned char abyBBVGA[BB_VGA_LEVEL]; + unsigned char bbvga_new; + unsigned char bbvga_current; + unsigned char bbvga[BB_VGA_LEVEL]; long dbm_threshold[BB_VGA_LEVEL]; - unsigned char byBBPreEDRSSI; + unsigned char bb_pre_edrssi; unsigned char byBBPreEDIndex; unsigned long dwDiagRefCount; @@ -264,7 +264,7 @@ struct vnt_private { /* For RF Power table */ unsigned char byCCKPwr; unsigned char byOFDMPwrG; - unsigned char byCurPwr; + unsigned char cur_pwr; char byCurPwrdBm; unsigned char abyCCKPwrTbl[CB_MAX_CHANNEL_24G + 1]; unsigned char abyOFDMPwrTbl[CB_MAX_CHANNEL + 1]; diff --git a/drivers/staging/vt6655/device_main.c b/drivers/staging/vt6655/device_main.c index 45e5eccadb..7d297526e6 100644 --- a/drivers/staging/vt6655/device_main.c +++ b/drivers/staging/vt6655/device_main.c @@ -177,9 +177,9 @@ device_set_options(struct vnt_private *priv) priv->byShortRetryLimit = priv->opts.short_retry; priv->byLongRetryLimit = priv->opts.long_retry; priv->byBBType = priv->opts.bbp_type; - priv->byPacketType = priv->byBBType; + priv->packet_type = priv->byBBType; priv->byAutoFBCtrl = AUTO_FB_0; - priv->bUpdateBBVGA = true; + priv->update_bbvga = true; priv->preamble_type = 0; pr_debug(" byShortRetryLimit= %d\n", (int)priv->byShortRetryLimit); @@ -359,7 +359,7 @@ static void device_init_registers(struct vnt_private *priv) RFbInit(priv); /* Get Desire Power Value */ - priv->byCurPwr = 0xFF; + priv->cur_pwr = 0xFF; priv->byCCKPwr = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_PWR_CCK); priv->byOFDMPwrG = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_PWR_OFDMG); @@ -423,10 +423,10 @@ static void device_init_registers(struct vnt_private *priv) /* initialize BBP registers */ bb_vt3253_init(priv); - if (priv->bUpdateBBVGA) { - priv->byBBVGACurrent = priv->abyBBVGA[0]; - priv->byBBVGANew = priv->byBBVGACurrent; - bb_set_vga_gain_offset(priv, priv->abyBBVGA[0]); + if (priv->update_bbvga) { + priv->bbvga_current = priv->bbvga[0]; + priv->bbvga_new = priv->bbvga_current; + bb_set_vga_gain_offset(priv, priv->bbvga[0]); } bb_set_rx_antenna_mode(priv, priv->byRxAntennaMode); @@ -1040,7 +1040,7 @@ static void vnt_check_bb_vga(struct vnt_private *priv) long dbm; int i; - if (!priv->bUpdateBBVGA) + if (!priv->update_bbvga) return; if (priv->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) @@ -1053,12 +1053,12 @@ static void vnt_check_bb_vga(struct vnt_private *priv) for (i = 0; i < BB_VGA_LEVEL; i++) { if (dbm < priv->dbm_threshold[i]) { - priv->byBBVGANew = priv->abyBBVGA[i]; + priv->bbvga_new = priv->bbvga[i]; break; } } - if (priv->byBBVGANew == priv->byBBVGACurrent) { + if (priv->bbvga_new == priv->bbvga_current) { priv->uBBVGADiffCount = 1; return; } @@ -1067,23 +1067,23 @@ static void vnt_check_bb_vga(struct vnt_private *priv) if (priv->uBBVGADiffCount == 1) { /* first VGA diff gain */ - bb_set_vga_gain_offset(priv, priv->byBBVGANew); + bb_set_vga_gain_offset(priv, priv->bbvga_new); dev_dbg(&priv->pcid->dev, "First RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n", - (int)dbm, priv->byBBVGANew, - priv->byBBVGACurrent, + (int)dbm, priv->bbvga_new, + priv->bbvga_current, (int)priv->uBBVGADiffCount); } if (priv->uBBVGADiffCount >= BB_VGA_CHANGE_THRESHOLD) { dev_dbg(&priv->pcid->dev, "RSSI[%d] NewGain[%d] OldGain[%d] Count[%d]\n", - (int)dbm, priv->byBBVGANew, - priv->byBBVGACurrent, + (int)dbm, priv->bbvga_new, + priv->bbvga_current, (int)priv->uBBVGADiffCount); - bb_set_vga_gain_offset(priv, priv->byBBVGANew); + bb_set_vga_gain_offset(priv, priv->bbvga_new); } } @@ -1442,7 +1442,7 @@ static int vnt_config(struct ieee80211_hw *hw, u32 changed) if (priv->byBBType != bb_type) { priv->byBBType = bb_type; - CARDbSetPhyParameter(priv, priv->byBBType); + card_set_phy_parameter(priv, priv->byBBType); } } @@ -1509,8 +1509,8 @@ static void vnt_bss_info_changed(struct ieee80211_hw *hw, else priv->short_slot_time = false; - CARDbSetPhyParameter(priv, priv->byBBType); - bb_set_vga_gain_offset(priv, priv->abyBBVGA[0]); + card_set_phy_parameter(priv, priv->byBBType); + bb_set_vga_gain_offset(priv, priv->bbvga[0]); } if (changed & BSS_CHANGED_TXPOWER) @@ -1534,7 +1534,7 @@ static void vnt_bss_info_changed(struct ieee80211_hw *hw, if (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INFO) && priv->op_mode != NL80211_IFTYPE_AP) { if (vif->cfg.assoc && conf->beacon_rate) { - CARDbUpdateTSF(priv, conf->beacon_rate->hw_value, + card_update_tsf(priv, conf->beacon_rate->hw_value, conf->sync_tsf); CARDbSetBeaconPeriod(priv, conf->beacon_int); @@ -1792,10 +1792,10 @@ vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent) vt6655_mac_read_ether_addr(priv->port_offset, priv->abyCurrentNetAddr); /* Get RFType */ - priv->byRFType = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_RFTYPE); - priv->byRFType &= RF_MASK; + priv->rf_type = SROMbyReadEmbedded(priv->port_offset, EEP_OFS_RFTYPE); + priv->rf_type &= RF_MASK; - dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType); + dev_dbg(&pcid->dev, "RF Type = %x\n", priv->rf_type); device_get_options(priv); device_set_options(priv); diff --git a/drivers/staging/vt6655/dpc.c b/drivers/staging/vt6655/dpc.c index c6ed3537f4..7ada188e20 100644 --- a/drivers/staging/vt6655/dpc.c +++ b/drivers/staging/vt6655/dpc.c @@ -79,7 +79,7 @@ static bool vnt_rx_data(struct vnt_private *priv, struct sk_buff *skb, RFvRSSITodBm(priv, *rssi, &rx_dbm); - priv->byBBPreEDRSSI = (u8)rx_dbm + 1; + priv->bb_pre_edrssi = (u8)rx_dbm + 1; priv->current_rssi = *rssi; skb_pull(skb, 4); diff --git a/drivers/staging/vt6655/rf.c b/drivers/staging/vt6655/rf.c index 1fadc2fc44..d319ec21c9 100644 --- a/drivers/staging/vt6655/rf.c +++ b/drivers/staging/vt6655/rf.c @@ -268,7 +268,7 @@ static bool RFbAL2230SelectChannel(struct vnt_private *priv, unsigned char byCha * Parameters: * In: * byBBType - * byRFType + * rf_type * Out: * none * @@ -279,7 +279,7 @@ bool RFbInit(struct vnt_private *priv) { bool ret = true; - switch (priv->byRFType) { + switch (priv->rf_type) { case RF_AIROHA: case RF_AL2230S: priv->max_pwr_level = AL2230_PWR_IDX_LEN; @@ -300,7 +300,7 @@ bool RFbInit(struct vnt_private *priv) * * Parameters: * In: - * byRFType + * rf_type * byChannel - Channel number * Out: * none @@ -308,12 +308,12 @@ bool RFbInit(struct vnt_private *priv) * Return Value: true if succeeded; false if failed. * */ -bool RFbSelectChannel(struct vnt_private *priv, unsigned char byRFType, +bool RFbSelectChannel(struct vnt_private *priv, unsigned char rf_type, u16 byChannel) { bool ret = true; - switch (byRFType) { + switch (rf_type) { case RF_AIROHA: case RF_AL2230S: ret = RFbAL2230SelectChannel(priv, byChannel); @@ -438,12 +438,12 @@ bool RFbSetPower(struct vnt_private *priv, unsigned int rate, u16 uCH) break; } - if (priv->byCurPwr == byPwr) + if (priv->cur_pwr == byPwr) return true; ret = RFbRawSetPower(priv, byPwr, rate); if (ret) - priv->byCurPwr = byPwr; + priv->cur_pwr = byPwr; return ret; } @@ -470,7 +470,7 @@ bool RFbRawSetPower(struct vnt_private *priv, unsigned char byPwr, if (byPwr >= priv->max_pwr_level) return false; - switch (priv->byRFType) { + switch (priv->rf_type) { case RF_AIROHA: ret &= IFRFbWriteEmbedded(priv, al2230_power_table[byPwr]); if (rate <= RATE_11M) @@ -521,7 +521,7 @@ RFvRSSITodBm(struct vnt_private *priv, unsigned char byCurrRSSI, long *pldBm) long a = 0; unsigned char abyAIROHARF[4] = {0, 18, 0, 40}; - switch (priv->byRFType) { + switch (priv->rf_type) { case RF_AIROHA: case RF_AL2230S: a = abyAIROHARF[byIdx]; diff --git a/drivers/staging/vt6655/rf.h b/drivers/staging/vt6655/rf.h index 9fef81846a..6f842ac005 100644 --- a/drivers/staging/vt6655/rf.h +++ b/drivers/staging/vt6655/rf.h @@ -58,7 +58,7 @@ /*--------------------- Export Functions --------------------------*/ bool IFRFbWriteEmbedded(struct vnt_private *priv, unsigned long dwData); -bool RFbSelectChannel(struct vnt_private *priv, unsigned char byRFType, u16 byChannel); +bool RFbSelectChannel(struct vnt_private *priv, unsigned char rf_type, u16 byChannel); bool RFbInit(struct vnt_private *priv); bool rf_write_wake_prog_syn(struct vnt_private *priv, unsigned char rf_type, u16 channel); bool RFbSetPower(struct vnt_private *priv, unsigned int rate, u16 uCH); -- cgit v1.2.3