From 9f0fc191371843c4fc000a226b0a26b6c059aacd Mon Sep 17 00:00:00 2001 From: Daniel Baumann Date: Sat, 18 May 2024 19:40:19 +0200 Subject: Merging upstream version 6.7.7. Signed-off-by: Daniel Baumann --- drivers/usb/dwc3/core.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'drivers/usb/dwc3/core.h') diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 6782ec8bfd..efe6caf4d0 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -996,6 +996,8 @@ struct dwc3_scratchpad_array { * @bus_clk: clock for accessing the registers * @ref_clk: reference clock * @susp_clk: clock used when the SS phy is in low power (S3) state + * @utmi_clk: clock used for USB2 PHY communication + * @pipe_clk: clock used for USB3 PHY communication * @reset: reset control * @regs: base address for our registers * @regs_size: address space size @@ -1115,6 +1117,8 @@ struct dwc3_scratchpad_array { * instances in park mode. * @parkmode_disable_hs_quirk: set if we need to disable all HishSpeed * instances in park mode. + * @gfladj_refclk_lpm_sel: set if we need to enable SOF/ITP counter + * running based on ref_clk * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk * @tx_de_emphasis: Tx de-emphasis value * 0 - -6dB de-emphasis @@ -1165,6 +1169,8 @@ struct dwc3 { struct clk *bus_clk; struct clk *ref_clk; struct clk *susp_clk; + struct clk *utmi_clk; + struct clk *pipe_clk; struct reset_control *reset; -- cgit v1.2.3