# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/sound/fsl,ssi.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Freescale Synchronous Serial Interface maintainers: - Shengjiu Wang description: Notes on fsl,playback-dma and fsl,capture-dma On SOCs that have an SSI, specific DMA channels are hard-wired for playback and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for playback and DMA channel 3 for capture. The developer can choose which DMA controller to use, but the channels themselves are hard-wired. The purpose of these two properties is to represent this hardware design. The device tree nodes for the DMA channels that are referenced by "fsl,playback-dma" and "fsl,capture-dma" must be marked as compatible with "fsl,ssi-dma-channel". The SOC-specific compatible string (e.g. "fsl,mpc8610-dma-channel") can remain. If these nodes are left as "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA drivers (fsldma) will attempt to use them, and it will conflict with the sound drivers. properties: compatible: oneOf: - items: - enum: - fsl,imx50-ssi - fsl,imx53-ssi - const: fsl,imx51-ssi - const: fsl,imx21-ssi - items: - enum: - fsl,imx25-ssi - fsl,imx27-ssi - fsl,imx35-ssi - fsl,imx51-ssi - const: fsl,imx21-ssi - items: - enum: - fsl,imx6q-ssi - fsl,imx6sl-ssi - fsl,imx6sx-ssi - const: fsl,imx51-ssi - items: - const: fsl,imx21-ssi - items: - const: fsl,mpc8610-ssi reg: maxItems: 1 interrupts: maxItems: 1 clocks: items: - description: The ipg clock for register access - description: clock for SSI master mode minItems: 1 clock-names: items: - const: ipg - const: baud minItems: 1 dmas: oneOf: - items: - description: DMA controller phandle and request line for RX - description: DMA controller phandle and request line for TX - items: - description: DMA controller phandle and request line for RX0 - description: DMA controller phandle and request line for TX0 - description: DMA controller phandle and request line for RX1 - description: DMA controller phandle and request line for TX1 dma-names: oneOf: - items: - const: rx - const: tx - items: - const: rx0 - const: tx0 - const: rx1 - const: tx1 "#sound-dai-cells": const: 0 description: optional, some dts node didn't add it. cell-index: $ref: /schemas/types.yaml#/definitions/uint32 enum: [0, 1, 2] description: The SSI index ac97-gpios: $ref: /schemas/types.yaml#/definitions/phandle-array description: Please refer to soc-ac97link.txt codec-handle: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to a 'codec' node that defines an audio codec connected to this SSI. This node is typically a child of an I2C or other control node. fsl,fifo-depth: $ref: /schemas/types.yaml#/definitions/uint32 description: The number of elements in the transmit and receive FIFOs. This number is the maximum allowed value for SFCSR[TFWM0]. enum: [8, 15] fsl,fiq-stream-filter: type: boolean description: Disabled DMA and use FIQ instead to filter the codec stream. This is necessary for some boards where an incompatible codec is connected to this SSI, e.g. on pca100 and pcm043. fsl,mode: $ref: /schemas/types.yaml#/definitions/string enum: [ ac97-slave, ac97-master, i2s-slave, i2s-master, lj-slave, lj-master, rj-slave, rj-master ] description: | "ac97-slave" - AC97 mode, SSI is clock slave "ac97-master" - AC97 mode, SSI is clock master "i2s-slave" - I2S mode, SSI is clock slave "i2s-master" - I2S mode, SSI is clock master "lj-slave" - Left justified mode, SSI is clock slave "lj-master" - Left justified mode, SSI is clock master "rj-slave" - Right justified mode, SSI is clock slave "rj-master" - Right justified mode, SSI is clock master fsl,ssi-asynchronous: type: boolean description: If specified, the SSI is to be programmed in asynchronous mode. In this mode, pins SRCK, STCK, SRFS, and STFS must all be connected to valid signals. In synchronous mode, SRCK and SRFS are ignored. Asynchronous mode allows playback and capture to use different sample sizes and sample rates. Some drivers may require that SRCK and STCK be connected together, and SRFS and STFS be connected together. This would still allow different sample sizes, but not different sample rates. fsl,playback-dma: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to a node for the DMA channel to use for playback of audio. This is typically dictated by SOC design. Only used on Power Architecture. fsl,capture-dma: $ref: /schemas/types.yaml#/definitions/phandle description: Phandle to a node for the DMA channel to use for capture (recording) of audio. This is typically dictated by SOC design. Only used on Power Architecture. required: - compatible - reg - interrupts - fsl,fifo-depth allOf: - $ref: dai-common.yaml# unevaluatedProperties: false examples: - | #include #include ssi@2028000 { compatible = "fsl,imx6q-ssi", "fsl,imx51-ssi"; reg = <0x02028000 0x4000>; interrupts = ; clocks = <&clks IMX6QDL_CLK_SSI1_IPG>, <&clks IMX6QDL_CLK_SSI1>; clock-names = "ipg", "baud"; dmas = <&sdma 37 1 0>, <&sdma 38 1 0>; dma-names = "rx", "tx"; #sound-dai-cells = <0>; fsl,fifo-depth = <15>; };