1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
|
Texas Instruments OMAP3 Display Subsystem
=========================================
See Documentation/devicetree/bindings/display/ti/ti,omap-dss.txt for generic
description about OMAP Display Subsystem bindings.
DSS Core
--------
Required properties:
- compatible: "ti,omap3-dss"
- reg: address and length of the register space
- ti,hwmods: "dss_core"
- clocks: handle to fclk
- clock-names: "fck"
Optional nodes:
- Video ports:
- Port 0: DPI output
- Port 1: SDI output
DPI Endpoint required properties:
- data-lines: number of lines used
SDI Endpoint required properties:
- datapairs: number of datapairs used
DISPC
-----
Required properties:
- compatible: "ti,omap3-dispc"
- reg: address and length of the register space
- ti,hwmods: "dss_dispc"
- interrupts: the DISPC interrupt
- clocks: handle to fclk
- clock-names: "fck"
Optional properties:
- max-memory-bandwidth: Input memory (from main memory to dispc) bandwidth limit
in bytes per second
RFBI
----
Required properties:
- compatible: "ti,omap3-rfbi"
- reg: address and length of the register space
- ti,hwmods: "dss_rfbi"
- clocks: handles to fclk and iclk
- clock-names: "fck", "ick"
VENC
----
Required properties:
- compatible: "ti,omap3-venc"
- reg: address and length of the register space
- ti,hwmods: "dss_venc"
- vdda-supply: power supply for DAC
- clocks: handle to fclk
- clock-names: "fck"
VENC Endpoint required properties:
- ti,invert-polarity: invert the polarity of the video signal
- ti,channels: 1 for composite, 2 for s-video
DSI
---
Required properties:
- compatible: "ti,omap3-dsi"
- reg: addresses and lengths of the register spaces for 'proto', 'phy' and 'pll'
- reg-names: "proto", "phy", "pll"
- interrupts: the DSI interrupt line
- ti,hwmods: "dss_dsi1"
- vdd-supply: power supply for DSI
- clocks: handles to fclk and pll clock
- clock-names: "fck", "sys_clk"
DSI Endpoint required properties:
- lanes: list of pin numbers for the DSI lanes: CLK+, CLK-, DATA0+, DATA0-,
DATA1+, DATA1-, ...
|
