blob: 51518399d7377909738a821fdc7c3e1016355a67 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
|
FLCTL NAND controller
Required properties:
- compatible : "renesas,shmobile-flctl-sh7372"
- reg : Address range of the FLCTL
- interrupts : flste IRQ number
- nand-bus-width : bus width to NAND chip
Optional properties:
- dmas: DMA specifier(s)
- dma-names: name for each DMA specifier. Valid names are
"data_tx", "data_rx", "ecc_tx", "ecc_rx"
The DMA fields are not used yet in the driver but are listed here for
completing the bindings.
The device tree may optionally contain sub-nodes describing partitions of the
address space. See mtd.yaml for more detail.
Example:
flctl@e6a30000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "renesas,shmobile-flctl-sh7372";
reg = <0xe6a30000 0x100>;
interrupts = <0x0d80>;
nand-bus-width = <16>;
dmas = <&dmac 1 /* data_tx */
&dmac 2;> /* data_rx */
dma-names = "data_tx", "data_rx";
system@0 {
label = "system";
reg = <0x0 0x8000000>;
};
userdata@8000000 {
label = "userdata";
reg = <0x8000000 0x10000000>;
};
cache@18000000 {
label = "cache";
reg = <0x18000000 0x8000000>;
};
};
|
